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2010-04-09Merge r100559 from mainline to fix PR6696.Tanya Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_27@100851 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-30Merge 99620 from mainline.Tanya Lattner
Do not sibcall if stack needs to be dynamically aligned. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_27@99955 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-30Merge 99043 from mainline.Tanya Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_27@99907 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-23Merge 99032 from mainline.Tanya Lattner
If call result is in ST0 and it is not being passed to the caller's caller, then it is not safe to optimize the call into a sibcall since the call result has to be popped off the x87 stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_27@99293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-23Merge 98561 from mainline.Tanya Lattner
Avoid sibcall optimization if either caller or callee is using sret semantics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_27@99290 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-12Merge 98205 from mainline.Tanya Lattner
Work around a bug in the openbsd assembler on i386, which doesn't support .quad correctly because it is "really really old". PR6528. Yet another reason the mc assembler should take over ;-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_27@98309 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-11Merge 98212 from mainline.Tanya Lattner
add support, testcases, and dox for the new GHC calling convention. Patch by David Terei! git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_27@98307 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-11Merge 98042.Tanya Lattner
Don't try to fold V_SET0 and V_SETALLONES to loads in medium and large code models. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_27@98301 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-08remove a non-temporal store pattern which is not tested and Chris Lattner
could never have matched because the operand list was backwards. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97933 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-06Re-committing the failed r97807 commit with changes to eliminate warnings.Wesley Peck
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97891 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-06Describe what's going on with mingw alloca and why do we need separate ↵Anton Korobeynikov
instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97888 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-06Initial bits of ARMv4-only support.Anton Korobeynikov
Patch by John Tytgat! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97886 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-06Lower dynamic stack allocation on mingw32 to separate instruction.Anton Korobeynikov
We cannot use a normal call here since it has extra unmodelled side effects (it changes stack pointer). This should fix PR5292. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97884 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-06Do not use '&' prefix for globals when register base field is non-zero, ↵Anton Korobeynikov
otherwise msp430-as will silently miscompile the code (TI's assembler report an error though). This fixes PR6349 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97877 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-06clean this up.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97870 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-06revert r97807, it introduced build warnings.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97869 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-06Thumb1 epilogue code generation needs to take into account that callee-savedJim Grosbach
registers may be restored via a pop instruction, not just a tRestore. This fixes nightly test 471.omnetep for Thumb1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97867 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-05Fix typo.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97818 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-05fix bss section printing for cell, patch by Kalle Raiskila!Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97814 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-05Reworking the stack layout that the MicroBlaze backend generates.Wesley Peck
The MicroBlaze backend was generating stack layouts that did not conform correctly to the ABI. This update generates stack layouts which are closer to what GCC does. Variable arguments support was added as well but the stack layout for varargs has not been finalized. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97807 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-05Fix an oops in x86 sibcall optimization. If the ByVal callee argument is ↵Evan Cheng
itself passed as a pointer, then it's obviously not safe to do a tail call. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97797 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-05Rever 96389 and 96990. They are causing some miscompilation that I do not ↵Evan Cheng
fully understand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97782 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-05Trivial comment change.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97776 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-05Revert r97766. It's deleting a tag.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97768 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-05Micro-optimization:Bill Wendling
This code: float floatingPointComparison(float x, float y) { double product = (double)x * y; if (product == 0.0) return product; return product - 1.0; } produces this: _floatingPointComparison: 0000000000000000 cvtss2sd %xmm1,%xmm1 0000000000000004 cvtss2sd %xmm0,%xmm0 0000000000000008 mulsd %xmm1,%xmm0 000000000000000c pxor %xmm1,%xmm1 0000000000000010 ucomisd %xmm1,%xmm0 0000000000000014 jne 0x00000004 0000000000000016 jp 0x00000002 0000000000000018 jmp 0x00000008 000000000000001a addsd 0x00000006(%rip),%xmm0 0000000000000022 cvtsd2ss %xmm0,%xmm0 0000000000000026 ret The "jne/jp/jmp" sequence can be reduced to this instead: _floatingPointComparison: 0000000000000000 cvtss2sd %xmm1,%xmm1 0000000000000004 cvtss2sd %xmm0,%xmm0 0000000000000008 mulsd %xmm1,%xmm0 000000000000000c pxor %xmm1,%xmm1 0000000000000010 ucomisd %xmm1,%xmm0 0000000000000014 jp 0x00000002 0000000000000016 je 0x00000008 0000000000000018 addsd 0x00000006(%rip),%xmm0 0000000000000020 cvtsd2ss %xmm0,%xmm0 0000000000000024 ret for a savings of 2 bytes. This xform can happen when we recognize that jne and jp jump to the same "true" MBB, the unconditional jump would jump to the "false" MBB, and the "true" branch is the fall-through MBB. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97766 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04Drop the ".w" qualifier for t2UXTB16* instructions as there is no 16-bit versionJohnny Chen
of either sxtb16 or uxtb16, and the unified syntax does not specify ".w". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97760 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04pr6478: The frame pointer spill frame index is only defined when there is aBob Wilson
frame pointer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97755 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04pr6480: Don't try producing ld/st-multiple instructions when the address isBob Wilson
an undef value. This is only going to come up for bugpoint-reduced tests -- correct programs will not access memory at undefined addresses -- so it's not worth the effort of doing anything more aggressive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97745 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04Fix the remaining MUL8 and DIV8 to define AX instead of AL,AH.Jakob Stoklund Olesen
These instructions technically define AL,AH, but a trick in X86ISelDAGToDAG reads AX in order to avoid reading AH with a REX instruction. Fix PR6489. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97742 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04Fix recognition of 16-bit bswap for C front-ends which emit theDan Gohman
clobber registers in a different order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97741 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04not committing what you test = bad.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97740 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04make gep matching in fastisel match the base of the gep as aChris Lattner
register if it isn't possible to match the indexes *and* the base. This fixes some fast isel rejects of load instructions on oggenc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97739 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04Added 32-bit Thumb instructions for Preload Data (PLD, PLDW) and PreloadJohnny Chen
Instruction (PLI) for disassembly only. According to A8.6.120 PLI (immediate, literal), for example, different instructions are generated for "pli [pc, #0]" and "pli [pc, #-0"]. The disassembler solves it by mapping -0 (negative zero) to -1, -1 to -2, ..., etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97731 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04add a comment.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97709 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04Teach the pic16 target to recognize pic16-*-* triples.John McCall
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97691 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03Modified the asm string of 16-bit Thumb MUL instruction so that it prints:Johnny Chen
MULS <Rdm>, <Rn>, <Rdm> according to A8.6.105 MUL Encoding T1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97675 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03Fix PR6444, note still doesn't compile libgcc2 all the way, but fixes that ↵Andrew Lenharth
error. May not fix it in an ABI complient way. It wasn't clear what gcc does git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97660 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03Added 32-bit Thumb instructions LDRT, LDRBT, LDRHT,,LDRSBT, LDRSHT, STRT, STRBT,Johnny Chen
and STRHT for disassembly only. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97655 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03remove nvload and two patterns that use it which are Chris Lattner
better done by dag combine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97633 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03Added 32-bit Thumb instructions t2NOP, t2YIELD, t2WFE, t2WFI, t2SEV, and t2DBGJohnny Chen
for disassembly only. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97632 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03factor the 'in the default address space' check out to a singleChris Lattner
'dsload' pattern. tblgen doesn't check patterns to see if they're textually identical. This allows better factoring. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97630 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03factor the 'sign extended from 8 bit' patterns better so Chris Lattner
that they are not destination type specific. This allows tblgen to factor them and the type check is redundant with what the isel does anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97629 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03- Change MachineInstr::isIdenticalTo to take a new option that determines ↵Evan Cheng
whether it should skip checking defs or at least virtual register defs. This subsumes part of the TargetInstrInfo::isIdentical functionality. - Eliminate TargetInstrInfo::isIdentical and replace it with produceSameValue. In the default case, produceSameValue just checks whether two machine instructions are identical (except for virtual register defs). But targets may override it to check for unusual cases (e.g. ARM pic loads from constant pools). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97628 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03Eliminate unused instruction classes.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97617 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03Added 32-bit Thumb instructions t2DMB variants, t2DSB variants, and t2ISBsy forJohnny Chen
disassembly only. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97614 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02merge two loops over all nodes in the graph into one.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97606 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02eliminate PreprocessForRMW now that isel handles it.Chris Lattner
We still preprocess calls and fp return stuff. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97598 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02remove 300 lines of code that is now dead in the MSP430 backendChris Lattner
now that isel handles chains more aggressively. This also allows us to make isLegalToFold non-virtual. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97597 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02Fix some issues in WalkChainUsers dealing with Chris Lattner
CopyToReg/CopyFromReg/INLINEASM. These are annoying because they have the same opcode before an after isel. Fix this by setting their NodeID to -1 to indicate that they are selected, just like what automatically happens when selecting things that end up being machine nodes. With that done, give IsLegalToFold a new flag that causes it to ignore chains. This lets the HandleMergeInputChains routine be the one place that validates chains after a match is successful, enabling the new hotness in chain processing. This smarter chain processing eliminates the need for "PreprocessRMW" in the X86 and MSP430 backends and enables MSP to start matching it's multiple mem operand instructions more aggressively. I currently #if out the dead code in the X86 backend and MSP backend, I'll remove it for real in a follow-on patch. The testcase changes are: test/CodeGen/X86/sse3.ll: we generate better code test/CodeGen/X86/store_op_load_fold2.ll: PreprocessRMW was miscompiling this before, we now generate correct code Convert it to filecheck while I'm at it. test/CodeGen/MSP430/Inst16mm.ll: Add a testcase for mem/mem folding to make anton happy. :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97596 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02Added 32-bit Thumb instruction CLREX (Clear-Exclusive) for disassembly only.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97595 91177308-0d34-0410-b5e6-96231b3b80d8
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