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2009-02-14Merge r64316 from mainline.Tanya Lattner
Don't try to set an EFLAGS operand to dead if no instruction was created. This fixes a bug introduced by r61215. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_25@64524 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-14Merge 64124 frm mainline.Tanya Lattner
Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty suprise to some callers, e.g. register coalescer. For now, add an parameter that tells AnalyzeBranch whether it's safe to modify the mbb. A better solution is out there, but I don't have time to deal with it right now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_25@64518 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-04Merge from mainline.Tanya Lattner
Tevert part of the x86 subtarget logic changes: when -march=x86-64 is given, override the subtarget settings and enable 64-bit support. This restores the earlier behavior, and fixes regressions on Non-64-bit-capable x86-32 hosts. This isn't necessarily the best approach, but the most obvious alternative is to require -mcpu=x86-64 or -mattr=+64bit to be used with -march=x86-64 when the host doesn't have 64-bit support. This makes things little more consistent, but it's less convenient, and it has the practical drawback of requiring lots of test changes, so I opted for the above approach for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_25@63792 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-03Create DebugLoc information in FastISel. Several temporary methods wereBill Wendling
created. Specifically, those BuildMIs which use "DebugLoc::getUnknownLoc()". I'll remove them soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63584 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-03Change Feature64Bit to not imply FeatureSSE2. All x86-64 hardware hasDan Gohman
SSE2, however it's possible to disable SSE2, and the subtarget support code thinks that if 64-bit implies SSE2 and SSE2 is disabled then 64-bit should also be disabled. Instead, just mark all the 64-bit subtargets as explicitly supporting SSE2. Also, move the code that makes -march=x86-64 enable 64-bit support by default to only apply when there is no explicit subtarget. If you need to specify a subtarget and you want 64-bit code, you'll need to select a subtarget that supports 64-bit code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63575 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-02Only force SSE level if it is not correct.Torok Edwin
Add an assert to check HasX86_64 status. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63552 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-02remove #if 0 code on Bill's request.Torok Edwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63542 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-02Made the common case of default address space directive as non-virtual for ↵Sanjiv Gupta
performance reasons. Provide a single virtual interface for directives of all sizes in non-default address spaces. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63521 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-02ADD / SUB / SMUL / UMUL with overflow second result top bits must be zero.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63509 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-02Add comment.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63506 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-02Teach LowerBRCOND to recognize (xor (setcc x), 1). The xor inverts the ↵Evan Cheng
condition. It's normally transformed by the dag combiner, unless the condition is set by a arithmetic op with overflow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63505 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-01Implement -mno-sse: if SSE is disabled on x86-64, don't store XMM on stack forTorok Edwin
var-args, and don't allow FP return values git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63495 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-01Fix PR3453 and probably a bunch of other potentialDuncan Sands
crashes or wrong code with codegen of large integers: eliminate the legacy getIntegerVTBitMask and getIntegerVTSignBit methods, which returned their value as a uint64_t, so couldn't handle huge types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63494 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-30Make LowerCallTo and LowerArguments take a DebugLocDale Johannesen
argument. Adjust all callers and overloaded versions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63444 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-30Get rid of the non-DebugLoc-ified getNOT() method.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63442 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-30Fixed the comment. No functionality change.Sanjiv Gupta
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63387 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-30Use sublw for comparison with literals instead of subwf.Sanjiv Gupta
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63382 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-30When PerformBuildVectorCombine, avoid creating a X86ISD::VZEXT_LOAD ofMon P Wang
an illegal type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63380 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-30Enable emitting of constant values in non-default address space as well. The ↵Sanjiv Gupta
APIs emitting constants now take an additional parameter signifying the address space in which to emit. The APIs like getData8BitsDirective() etc are made virtual enabling targets to be able to define appropirate directivers for various sizes and address spaces. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63377 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-29Make x86's BT instruction matching more thorough, and add someDan Gohman
dagcombines that help it match in several more cases. Add several more cases to test/CodeGen/X86/bt.ll. This doesn't yet include matching for BT with an immediate operand, it just covers more register+register cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63266 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28Fixed lowering of v816 shuffles.Mon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63252 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28Rename getAnalysisToUpdate to getAnalysisIfAvailable.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63198 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28The memory alignment requirement on some of the mov{h|l}p{d|s} patterns are ↵Evan Cheng
16-byte. That is overly strict. These instructions read / write f64 memory locations without alignment requirement. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63195 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28Add shuffle splat pattern for x86 sse shifts.Mon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63193 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28Suppress a compile time warning.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63161 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27Treat [1 x i8] zeroinitializer as a C string, placing such stuff intoAnton Korobeynikov
mergeable string section. I don't see any bad impact of such decision (rather then placing it into mergeable const section, as it was before), but at least Darwin linker won't complain anymore. The problem in LLVM is that we don't have special type for string constants (like gcc does). Even more, we have two separate types: ConstatArray for non-null strings and ConstantAggregateZero for null stuff.... It's a bit weird :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63142 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27Reformat the allocation-order arrays to a more conventional style.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63121 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27Respect the DisableRedZone flag on PowerPC.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63119 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27Simplify findNonImmUse; return the result using the return valueDan Gohman
instead of via a by-reference argument. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63118 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27Implement multiple with overflow by 2 with an add instruction.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63090 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27Eliminate unnecessary operands-list traversals.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63088 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27Enable the red zone on x86-64 by default.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63078 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27Fix the Red Zone calculation for functions with frame pointers.Dan Gohman
Don't use the Red Zone when dynamic stack realignment is needed. This could be implemented, but most x86-64 ABIs don't require dynamic stack realignment so it isn't urgent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63074 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26CellSPU:Scott Michel
- Update DWARF debugging support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63059 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26Make the Dwarf macro information section optional; CellSPU's assemblerScott Michel
doesn't support it. The default is set to 'true', so this should not impact any other target backends. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63058 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26Implement Red Zone utilization on x86-64. This is currentlyDan Gohman
disabled by default; I'll enable it when I hook it up with the llvm-gcc flag which controls it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63056 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26Enhance logic in X86DAGToDAGISel::PreprocessForRMW which move load inside ↵Evan Cheng
callseq_start to allow it to be folded into a call. It was not considering the cases where a token factor is between the load and the callseq_start. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26Take the next steps in making SDUse more consistent with LLVM Use, andDan Gohman
tidy up SDUse and related code. - Replace the operator= member functions with a set method, like LLVM Use has, and variants setInitial and setNode, which take care up updating use lists, like LLVM Use's does. This simplifies code that calls these functions. - getSDValue() is renamed to get(), as in LLVM Use, though most places can either use the implicit conversion to SDValue or the convenience functions instead. - Fix some more node vs. value terminology issues. Also, eliminate the one remaining use of SDOperandPtr, and SDOperandPtr itself. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62995 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26Untabify code.Scott Michel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62991 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26CellSPU:Scott Michel
- Rename fcmp.ll test to fcmp32.ll, start adding new double tests to fcmp64.ll - Fix select_bits.ll test - Capitulate to the DAGCombiner and move i64 constant loads to instruction selection (SPUISelDAGtoDAG.cpp). <rant>DAGCombiner will insert all kinds of 64-bit optimizations after operation legalization occurs and now we have to do most of the work that instruction selection should be doing twice (once to determine if v2i64 build_vector can be handled by SelectCode(), which then runs all of the predicates a second time to select the necessary instructions.) But, CellSPU is a good citizen.</rant> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62990 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26Fix a typoNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62989 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26De-identifying per sabre reviewNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26Map address space 256 to gs; similar mappings could be supported for theNate Begeman
other x86 segments. address space 0 is stack/default, 1-255 are reserved for client use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62980 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26Support pattern matching various x86 sse shifts.Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62979 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-25silence a warning when assertions are disabled.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62976 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-25should have removed the + when manually applying a patch!Torok Edwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62973 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-25revert this patch for now, because Codegen does still want to generate SSE code,Torok Edwin
for example in the case of va-args. XFAIL associated tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62972 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-25If user explicitly asks not to use SSE, don't force it. This fixes LLVM part ↵Torok Edwin
of PR3402. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62967 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-25Private linkage support for PPC / Darwin.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62955 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-24Fix an indent and a typo.Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62940 91177308-0d34-0410-b5e6-96231b3b80d8
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