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2008-06-04Merge from mainline to fix PR2407.Tanya Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_23@51962 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-02Merge from mainline.Tanya Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_23@51869 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-22Merge from mainline.Tanya Lattner
fix an off-by-one error in my previous patch, don't treat the callee as a incoming arg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_23@51438 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-22Merge from mainline.Tanya Lattner
Add support for multiple-return values in inline asm. This should get inline asm working as well as it did previously with the CBE with the new MRV support for inline asm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_23@51437 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-22Merge from mainline.Tanya Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_23@51416 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-22Merge from mainline.Tanya Lattner
Fix and encoding error in the psrad xmm, imm8 instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_23@51411 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-22Merge from mainline.Tanya Lattner
Fix one more encoding bug. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_23@51410 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12Merge from mainline.Tanya Lattner
Fix a compile error on compilers that still want a return value in a non-void function that calls abort. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_23@50982 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12Merge from mainline.Tanya Lattner
When transforming a vector_shuffle to a load, the base address must not be an undef. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_23@50981 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-10For now, abort when an ISD::VAARG is encountered on x86-64, ratherDan Gohman
than silently generate invalid code. llvm-gcc does not currently use VAArgInst; it lowers va_arg in the front-end. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50930 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-10Some clean up.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50929 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-10If movl top bits are undef, let it be selected to movlps, etc.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50928 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-09Add a pattern to do move the low element of a v4f32 and zero extend the rest.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50922 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-09Handle a few more cases of folding load i64 into xmm and zero top bits.Evan Cheng
Note, some of the code will be moved into target independent part of DAG combiner in a subsequent patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50918 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-08Use movq to move low half of XMM register and zero-extend the rest.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50874 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-08Handle vector move / load which zero the destination register top bits (i.e. ↵Evan Cheng
movd, movq, movss (addr), movsd (addr)) with X86 specific dag combine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50838 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-07Output correct exception handling and frame infoDuncan Sands
on x86-64 linux. This causes no regressions on 32 bit linux and 32 bit ppc. More tests pass on 64 bit ppc with no regressions. I didn't turn on eh on 64 bit linux because the intrinsics needed to compile the eh runtime aren't done yet. But if you turn it on and link with the mainline runtime then eh seems to work fine on x86-64 linux with this patch. Thanks to Dale for testing. The main point of the patch is that if you output that some object is encoded using 4 bytes you had better not output 8 bytes for it: the patch makes everything consistent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50825 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-06Match things like 'armv5tejl-unknown-linux-gnu' for PR2290Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50698 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-06Make several variable declarations static.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50696 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-05add a micro optzn.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50681 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-05Improved generated code for atomic operatorsMon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50677 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-05Code clean up. No functionality change.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50675 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-05Added addition atomic instrinsics and, or, xor, min, and max.Mon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50663 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-05Fix IsLinux being uninitialized on non-Linux targets.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50660 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-05Fix 80col violationAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50654 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-05Use a dedicated IsLinux flag instead of an ELFLinux TargetType.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50649 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-05Add AsmPrinter support for emitting a directive to declare thatDan Gohman
the code being generated does not require an executable stack. Also, add target-specific code to make use of this on Linux on x86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50634 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-04Add General Dynamic TLS model for X86-64. Some parts looks really ugly (look ↵Anton Korobeynikov
for tlsaddr pattern), but should work. Work is in progress, more models will follow git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50630 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-04Select vector shift with non-immediate i32 shift amount operand by first ↵Evan Cheng
moving the operand into the right register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50619 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-03Add separate intrinsics for MMX / SSE shifts with i32 integer operands. This ↵Evan Cheng
allow us to simplify the horribly complicated matching code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50601 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-02Undo r50574. We are already ensuring the folded load address is 16-byte aligned.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50578 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-0280 column violation.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50575 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-02Not safe folding a load + FsXORPSrr into FsXORPSrm. It's loading a FR64 ↵Evan Cheng
value but the load folding variant expects a 16-byte aligned address. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50574 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-30Tail call optimization improvements:Arnold Schwaighofer
Move platform independent code (lowering of possibly overwritten arguments, check for tail call optimization eligibility) from target X86ISelectionLowering.cpp to TargetLowering.h and SelectionDAGISel.cpp. Initial PowerPC tail call implementation: Support ppc32 implemented and tested (passes my tests and test-suite llvm-test). Support ppc64 implemented and half tested (passes my tests). On ppc tail call optimization is performed if caller and callee are fastcc call is a tail call (in tail call position, call followed by ret) no variable argument lists or byval arguments option -tailcallopt is enabled Supported: * non pic tail calls on linux/darwin * module-local tail calls on linux(PIC/GOT)/darwin(PIC) * inter-module tail calls on darwin(PIC) If constraints are not met a normal call will be emitted. A test checking the argument lowering behaviour on x86-64 was added. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50477 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-30Bug fixes and updates for CellSPU, syncing up with trunk. Most notableScott Michel
fixes are target-specific lowering of frame indices, fix constants generated for the FSMBI instruction, and fixing SPUTargetLowering::computeMaskedBitsFor- TargetNode(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50462 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-29Don't do stupid things: doInitialization(Module&) is not applicable to ↵Anton Korobeynikov
ModulePass :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50433 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28Fix the SVOffset values for loads and stores produced byDan Gohman
memcpy/memset expansion. It was a bug for the SVOffset value to be used in the actual address calculations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50359 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28Fix FP return for Win64 ABIAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50342 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-27Properly lower vararg's FORMAL_ARGUMENTS node on win64Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50325 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-27Handle fp80 for win64Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50324 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-26A few inline asm cleanups:Chris Lattner
- Make targetlowering.h fit in 80 cols. - Make LowerAsmOperandForConstraint const. - Make lowerXConstraint -> LowerXConstraint - Make LowerXConstraint return a const char* instead of taking a string byref. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50312 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-26no need to implement this method and just have it callChris Lattner
the default impl. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50311 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-25Extract the lower 64-bit if a MMX value is passed in a XMM register.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50292 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-25Fix illegal MMX_MOVDQ2Qrr pattern. vector_extract result must be a scalar value.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50291 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-25Special handling for MMX values being passed in either GPR64 or lower ↵Evan Cheng
64-bits of XMM registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50289 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-25Fix MMX_MOVQ2DQrr pattern. It's illegal to do a bitconvert from a smaller ↵Evan Cheng
type to a larger one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50278 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-25add a noteChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50267 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-2580 col violation.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50266 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-25Not checking for intrinsics which do not have a chain operand.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50260 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-25- Switch from std::set to SmallPtrSet.Evan Cheng
- Add comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50259 91177308-0d34-0410-b5e6-96231b3b80d8
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