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2007-10-13Clarify that fastcc has a problem with nested functionDuncan Sands
trampolines, rather than with nested functions themselves. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42955 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-13Change unfoldMemoryOperand(). User is now responsible for passing in theEvan Cheng
register used by the unfolded instructions. User can also specify whether to unfold the load, the store, or both. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42946 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12Correcting the corrections. Bad bad baaad emacs!Arnold Schwaighofer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42935 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12Corrected many typing errors. And removed 'nest' parameter handlingArnold Schwaighofer
for fastcc from X86CallingConv.td. This means that nested functions are not supported for calling convention 'fastcc'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42934 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12Due to the new tail call optimization, trampolines can noDuncan Sands
longer be created for fastcc functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42925 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12Update.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42922 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12Change the names used for internal labels to use the currentDan Gohman
function symbol name instead of a codegen-assigned function number. Thanks Evan! :-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42908 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12Mark vector ctpop, cttz, and ctlz as Expand on x86.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42905 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12Mark vector pow, ctpop, cttz, and ctlz as Expand on PowerPC.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42904 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12Fold load / store into MOV32to32_ and MOV16to16_.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42895 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12Flag MOV32to32_ with EXTRACT_SUBREG. They should not be scheduled apart.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42894 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11Set ISD::FPOW to Expand.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42881 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11Add missing argument to PALIGNRDale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42874 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11Added tail call optimization to the x86 back end. It can beArnold Schwaighofer
enabled by passing -tailcallopt to llc. The optimization is performed if the following conditions are satisfied: * caller/callee are fastcc * elf/pic is disabled OR elf/pic enabled + callee is in module + callee has visibility protected or hidden git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42870 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-10Fix CodeGen/Generic/BasicInstrs.llx on sparc by marking divremChris Lattner
illegal. Thanks to gabor for pointing this out! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42832 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-10Next PPC long double bits: ppcf128->i32 conversion.Dale Johannesen
Surprisingly complicated. Adds getTargetNode for 2 outputs, no inputs (missing). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42822 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-09LowerIntegerDivOrRem no longer exists.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42787 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-09Fix grammar in a comment.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42786 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-09This is done.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42785 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-09Under 64-bit mode use LEA64_32r instead of LEA64r to save a byte.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42783 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-09Position Independent Code (PIC) support [3]Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42780 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-09Position Independent Code (PIC) support [2]Bruno Cardoso Lopes
- Added a function to hold the stack location where GP must be stored during LowerCALL - AsmPrinter now emits directives based on relocation type - PIC_ set to default relocation type (same as GCC) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42779 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-09Position Independent Code (PIC) support [1]Bruno Cardoso Lopes
- Modified instruction format to handle pseudo instructions - Added LoadAddr SDNode to load symbols. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42778 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08Bug fix. X86 was emitting redundant setcc and test instructions before a ↵Evan Cheng
conditional move. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42774 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} toDan Gohman
use ISD::{S,U}DIVREM and ISD::{S,U}MUL_HIO. Move the lowering code associated with these operators into target-independent in LegalizeDAG.cpp and TargetLowering.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42762 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08Allow x86 compare to be commutable by default.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42761 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08When we start enabling SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM inDan Gohman
target-indepenent lowering, don't use them on PowerPC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42755 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08Simplify getIntPtrType, allowing it to work for arbitrary pointer sizes.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42751 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-07disable this entirely: it is causing use of invalidated iterators and ↵Chris Lattner
infinite looping. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42739 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-07Fix many regressions on x86 by avoiding dereferencing the end iterator.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42738 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-06Oops, I really wanted to commit this part also :)Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42700 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-06Move merge code into new helper function.Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42699 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-06Added DAG xforms. e.g.Evan Cheng
(vextract (v4f32 s2v (f32 load $addr)), 0) -> (f32 load $addr) (vextract (v4i32 bc (v4f32 s2v (f32 load $addr))), 0) -> (i32 load $addr) Remove x86 specific patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42677 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-06Next powerpc long double bits. Comparisons work,Dale Johannesen
although not well, and shortening FP converts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42672 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05Commute x86 cmove instructions by swapping the operands and change the conditionEvan Cheng
to its inverse. Testing this as llcbeta git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42661 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05This is done.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42656 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05Enable convertToThreeAddress for X86 by default.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42655 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05INC64_32r -> LEA64_32r is better than INC64_32r -> LEA32r, but it still canEvan Cheng
cause performance degradation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42653 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05In 64-bit mode, avoid using leal with 32-bit 32-bit address size, e.g.Evan Cheng
leal 1(%ecx), %edi, which requires 67H prefix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42647 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05First round of ppc long double. call/return andDale Johannesen
basic arithmetic works. Rename RTLIB long double functions to distinguish different flavors of long double; the lib functions have different names, alas. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42644 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05Add support to convert more 64-bit instructions to 3-address instructions.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42642 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05ADC and SBB uses EFLAGS.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42640 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05Change a few more spaces to tabs in assembly output.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42638 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05Change a space to a tab in the assembly output of a .globl directiveDan Gohman
for consistency. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42637 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05Testing convertToThreeeAddress as X86 llcbeta.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42630 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05Added storeRegToAddr, loadRegFromAddr, and unfoldMemoryOperand's.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42624 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05Not needed any more.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42623 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05Forgot these.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42622 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05- Added a few target hooks to generate load / store instructions from / to anyEvan Cheng
address (not just from / to frameindexes). - Added target hooks to unfold load / store instructions / SDNodes into separate load, data processing, store instructions / SDNodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42621 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-04add a note.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42607 91177308-0d34-0410-b5e6-96231b3b80d8
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