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2007-08-18createMipsDelaySlotFillerPass added to mips codegen runtime Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41154 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-18Added Branch Analysis support Bruno Cardoso Lopes
Added InsertNoop support git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41153 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-18LowerRETURNADDR removed since it was wrong and does not have utility yet!Bruno Cardoso Lopes
MipsAdd opcode added git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41152 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-18InstrItineraryData support on added.Bruno Cardoso Lopes
Added Mips3 ISA feature (needed when supporting R4000 machines) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41151 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-18A Pass to insert Nops on intructions with DelaySlotBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41150 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-18Mips generic fallback instruction schedule support!Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41149 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-15Move ReturnAddrIndex variable to X86MachineFunctionInfo structure. This fixedAnton Korobeynikov
hard to catch bugs with retaddr lowering git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41104 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-15add a note.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41103 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-13Fix a typo pointd out by Maarten ter Huurne.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41059 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-13When x86 addresses matching exceeds its recursion limit, check toDan Gohman
see if the base register is already occupied before assuming it can be used. This fixes bogus code generation in the accompanying testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41049 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-13Fix PR1607Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41048 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-11expand a noteChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41021 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-11With evan's explicit flag representation, hopefully we will finally beChris Lattner
able to 3-addressify away stuff like this: movl %ecx, %eax decl %eax git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41020 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-1164-bit SSSE3 ops that use MMX registers don't require 16-byte alignment.Bill Wendling
Make a 'memop' pattern just for them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41017 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-10Use subregs to improve any_extend code generation when feasible.Christopher Lamb
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41013 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-10Increase efficiency of sign_extend_inreg by using subregisters for ↵Christopher Lamb
truncation. As the README suggests sign_extend_subreg is selected to (sext(trunc)). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41010 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-10Edit README in light of previous LEA16 commit.Christopher Lamb
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41009 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-10Add 2-addr to 3-addr promotion code that allows 32-bit LEA to be used via ↵Christopher Lamb
subregisters when 16-bit LEA is disabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41007 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-10propagate struct size and alignment of byval arguments to the DAGRafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40986 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-10For kicks, I though it would be fun to use the correct opcode.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40985 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-10Adding SSSE3 intrinsics.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40982 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-09Temporarily backing out this change until we know why some dejagnu tests are ↵Evan Cheng
failing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40973 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-09divb / mulb outputs to ah. Under x86-64 it's not legal to read ah if the ↵Evan Cheng
instruction requires a rex prefix (i.e. outputs to r8b, etc.). So issue shift right by 8 on AX and then truncate it to 8 bits instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40972 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-09GR16_ sub-register class should be GR8_, not GR8. That is, it should only be ↵Evan Cheng
8-bit registers in 32-bit mode. Ditto for GR32_. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40970 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-09long double 9 of N. This finishes up the X86-32 bitsDale Johannesen
(constants are still not handled). Adds ConvertActions to control fp-to-fp conversions (these are currently defaulted for all other targets, so no changes there). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40958 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-09Fix arguments for some Altivec instructions. From SWB.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40957 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-07Fix spelling of mtvscr and mfvscr.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40908 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-07Long double patch 8 of N: make it partially work inDale Johannesen
SSE mode (all but conversions <-> other FP types, I think): >>Do not mark all-80-bit operations as "Requires[FPStack]" (which really means "not SSE"). >>Refactor load-and-extend to facilitate this. >>Update comments. >>Handle long double in SSE when computing FP_REG_KILL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40906 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-07Initial JIT support for ARM by Raul Fernandes Herbster.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40887 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-07Long double patch 7 of N, unless I lost count:). Dale Johannesen
Last x87 bits for full functionality (not thoroughly tested, and long doubles do not work in SSE modes at all - use -mcpu=i486 for now) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40886 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-06Replace 4-line function with 10-line version per review comment.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40881 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-06Move lengthy conditional down 1 level per review comment.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40878 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-06Get X86 long double calling convention to workDale Johannesen
(on Darwin, anyway). Fix some table omissions for LD arithmetic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40877 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-06Make 80-bit store maintain simulated FP stack correctly.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40868 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-05Fix minor doxygen nits.Reid Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40854 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-05Long double patch 4 of N: initial x87 implementation.Dale Johannesen
Lots of problems yet but some simple things work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40847 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-04This is the patch to provide clean intrinsic function overloading support in ↵Chandler Carruth
LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future. This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40807 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-03Make x86 long double alignment 32 for everything butDale Johannesen
Darwin (which makes size within a struct==96) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40796 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-03long double patch 2 of N. Handle it in TargetData.Dale Johannesen
(I've tried to get the info right for all targets, but I'm not expert on all of them - check yours.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40792 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-03add an observationChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40772 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-02More explicit keywords.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40757 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-02Fix the alignment requirements of several unpck and shuf instructions.Dan Gohman
Generalize isPSHUFDMask and add a unary SHUFPD pattern so that SHUFPD's memory operand alignment can be tested as well, with a fix to avoid breaking MMX's use of isPSHUFDMask. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40756 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-02Fix pastos in vector arithmetic intrinsics.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40754 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-02Mark the SSE and MMX load instructions thatDan Gohman
X86InstrInfo::isReallyTriviallyReMaterializable knows how to handle with the isReMaterializable flag so that it is given a chance to handle them. Without hoisting constant-pool loads from loops this isn't very visible, though it does keep CodeGen/X86/constant-pool-remat-0.ll from making a copy of the constant pool on the stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40736 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-02Switch some multiplication instructions over to the new scheme for testing.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40723 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-01Can't handle offset and scale if rip-relative addressing is to be used.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40703 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-01Mac OS X X86-64 low 4G address not available.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40702 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-01Mac OS X X86-64 low 4G address not available.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40701 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-01Some out operands were incorrectly specified as input operands.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40697 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-01Missing Requires.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40691 91177308-0d34-0410-b5e6-96231b3b80d8
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