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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6792 91177308-0d34-0410-b5e6-96231b3b80d8
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the convention.
:-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6791 91177308-0d34-0410-b5e6-96231b3b80d8
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involves removing the [bwl] suffixes from instruction names, as well
as some other distinguishing marks (32/64/80 on fp insns, _i suffixes, etc.)
Lowercase all instr. names as well for consistency's sake.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6790 91177308-0d34-0410-b5e6-96231b3b80d8
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to print various things on a module-by-module basis (currently, only the
former is used).
Don't print < > around names. The assembler can't take it.
Print pseudoinstructions only as comments. The poor little assembler can't
take that, either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6789 91177308-0d34-0410-b5e6-96231b3b80d8
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(non-working) of llc guts for X86, and add a prototype for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6779 91177308-0d34-0410-b5e6-96231b3b80d8
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Move LowerAllocations, PrintFunction, and SymbolStripping passes, and
the corresponding -disable-strip and -d options, over here to the SPARC
target-specific bits of llc. Rename -d to -dump-asm.
tools/llc/Makefile:
Reindent. Add x86 library so that llc compiles again.
tools/llc/llc.cpp:
Remove support for running arbitrary optimization passes. Use opt instead.
Remove LowerAllocations, PrintFunction, and SymbolStripping passes, as noted
above.
Allow user to select a backend (x86 or SPARC); default to guessing from
the endianness/pointer size of the input bytecode file.
Fix typos.
Delete empty .s file and exit with error status if target does not support
static compilation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6776 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6765 91177308-0d34-0410-b5e6-96231b3b80d8
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into a new function FPCSafeToPrint(), and use it in printConstant()
and printFunction() to decide whether we should output ConstantFPs as
floating-point constants or as references to stack-allocated variables.
lib/VMCore/AsmWriter.cpp: Fix an apparent typo in the code mentioned above.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6762 91177308-0d34-0410-b5e6-96231b3b80d8
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instead of a variable pointer and an alloca. All accesses to the variable then
use the address-of operator to access it. This plays better with the internal
GCC code generation phases, which bail early on functions which contain allocas.
It also makes the code a bit easier to read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6734 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6728 91177308-0d34-0410-b5e6-96231b3b80d8
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optimized INTO an alloca
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6727 91177308-0d34-0410-b5e6-96231b3b80d8
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Remove usage of alloca
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6725 91177308-0d34-0410-b5e6-96231b3b80d8
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so that we can easily change its use to be conditional on the result of
an autoconf test later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6723 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6712 91177308-0d34-0410-b5e6-96231b3b80d8
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sparc internal
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6711 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6704 91177308-0d34-0410-b5e6-96231b3b80d8
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Fix bug: CBackend/2003-06-11-LiteralStringProblem.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6697 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6692 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6682 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6678 91177308-0d34-0410-b5e6-96231b3b80d8
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add a function ModuloScheduling::dumpFinalSchedule() to print out final schedule
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6677 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6676 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6675 91177308-0d34-0410-b5e6-96231b3b80d8
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add some comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6674 91177308-0d34-0410-b5e6-96231b3b80d8
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add comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6673 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6672 91177308-0d34-0410-b5e6-96231b3b80d8
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SETTING the operand to be an immediate or have verified that one of the operands
is really a SignExtended or Unextended immediate value already, which warrants
an 'i' opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6662 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6658 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6657 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6656 91177308-0d34-0410-b5e6-96231b3b80d8
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* BPA and BPN do not take a %cc register as a parameter
* SLL/SRL/SRA{r,i}5 are there for a reason - they are ONLY 32-bit instructions
* Likewise, SLL/SRL/SRAX{r,i}6 are only 64-bit
* Added WRCCR{r,i} opcodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6655 91177308-0d34-0410-b5e6-96231b3b80d8
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* Removed instruction scheduling as it is too slow to run in a JIT environment
* Removed other passes because they aren't necessary and can slow JIT down
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6652 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6651 91177308-0d34-0410-b5e6-96231b3b80d8
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address of a floating-point (allocated via ConstantPool) correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6647 91177308-0d34-0410-b5e6-96231b3b80d8
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Add GROSS HACK to get CompilationCallback to work when compiled in release mode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6646 91177308-0d34-0410-b5e6-96231b3b80d8
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* Do not block a print statement with a DEBUG() guard if we're going to abort()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6645 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6644 91177308-0d34-0410-b5e6-96231b3b80d8
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that tests can automatically diff the output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6642 91177308-0d34-0410-b5e6-96231b3b80d8
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Now %fcc registers are recognized correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6640 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6639 91177308-0d34-0410-b5e6-96231b3b80d8
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class, because they are currently unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6638 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6637 91177308-0d34-0410-b5e6-96231b3b80d8
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Also, reorder a couple of functions for inlining.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6635 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6633 91177308-0d34-0410-b5e6-96231b3b80d8
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* Stop mapping FBcc instructions to deprecated opcodes, map to FBPcc instead.
* Fixed opf in FCMPxy instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6632 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6627 91177308-0d34-0410-b5e6-96231b3b80d8
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This avoid generating a register to hold C, which in turn speeds up the
register allocator by a lot: ~9% on 164.gzip and ~17% on 256.bzip2. This
also speeds up other passes. This also speeds up execution of the program
marginally, and makes the asm much easier to read. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6626 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6625 91177308-0d34-0410-b5e6-96231b3b80d8
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Special cases: STFSRx and STXFSRx - they operate on predefined rd=0 or rd=1, and
expect %fsr as the parameter in assembly. They are disabled (since not used)
until an encoding, both for code generation and output, is chosen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6619 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6618 91177308-0d34-0410-b5e6-96231b3b80d8
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