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2012-06-23Move CVTPD2DQ to use SSE2 predicate instead of SSE3. Move DQ2PD and PD2DQ to ↵Craig Topper
the SSE2 section of the file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159086 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-23Use correct memory types for (V)CVTDQ2PD instructions.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159075 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-23Compress flags in X86 op folding to reduce space in static tables.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159073 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-23Make helper method static since it doesn't use anything in the class.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159071 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-23Remove intrinsic specific instructions for 128-bit (V)CVTDQ2PD. Replace with ↵Craig Topper
intrinsic patterns. Mem forms omitted because the load size is only 64-bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159070 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-23Handle aliases to tls variables in all architectures, not just x86.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159058 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Whitespace.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159035 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Functions calling __builtin_eh_return must have a frame pointer.Jakob Stoklund Olesen
The code in X86TargetLowering::LowerEH_RETURN() assumes that a frame pointer exists, but the frame pointer was forced by the presence of llvm.eh.unwind.init which isn't guaranteed. If llvm.eh.unwind.init is actually required in functions calling eh.return (is it?), we should diagnose that instead of emitting bad machine code. This should fix the dragonegg-x86_64-linux-gcc-4.6-test bot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158961 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-20Remove 'static' from inline functions defined in header files.Chandler Carruth
There is a pretty staggering amount of this in LLVM's header files, this is not all of the instances I'm afraid. These include all of the functions that (in my build) are used by a non-static inline (or external) function. Specifically, these issues were caught by the new '-Winternal-linkage-in-inline' warning. I'll try to just clean up the remainder of the clearly redundant "static inline" cases on functions (not methods!) defined within headers if I can do so in a reliable way. There were even several cases of a missing 'inline' altogether, or my personal favorite "static bool inline". Go figure. ;] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158800 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-20Add predicate check around some patterns.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158797 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-20Add predicate check around some patterns.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158795 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-20Don't insert 128-bit UNDEF into 256-bit vectors. Just keep the 256-bit ↵Craig Topper
vector. Original patch by Elena Demikhovsky. Tweaked by me to allow possibility of covering more cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158792 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-19Move the support for using .init_array from ARM to the genericRafael Espindola
TargetLoweringObjectFileELF. Use this to support it on X86. Unlike ARM, on X86 it is not easy to find out if .init_array should be used or not, so the decision is made via TargetOptions and defaults to off. Add a command line option to llc that enables it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158692 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-18Temporarily revert r158087.Chandler Carruth
This patch causes problems when both dynamic stack realignment and dynamic allocas combine in the same function. With this patch, we no longer build the epilog correctly, and silently restore registers from the wrong position in the stack. Thanks to Matt for tracking this down, and getting at least an initial test case to Chad. I'm going to try to check a variation of that test case in so we can easily track the fixes required. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158654 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-16*no need to pollute Intel syntax with bonus mnemonics; operand size is ↵Kay Tiong Khoo
explicitly specified git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158603 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15*fixed to separate mnemonic from operands with tabKay Tiong Khoo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158543 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15Move AVX version of convert instructions that write to GPRs to the Op1 table.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158497 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14Move X86::VCVTTSD2SIrr from the 2 operand to 1 operand MemRegOp table.Pete Cooper
Can someone with more knowledge of this please look at other entries to see if others need moved. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158474 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-13Fix intrinsics for XOP frczss/sd instructions. These instructions only take ↵Craig Topper
one source register and zero the upper bits of the destination rather than preserving them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158396 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-10Add intrinsics for immediate form of XOP vprot instructions. Use i128mem ↵Craig Topper
instead of f128mem for integer XOP instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158291 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-09Use XOP vpcom intrinsics in patterns instead of a target specific SDNode ↵Craig Topper
type. Remove the custom lowering code that selected the SDNode type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158279 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-09Replace XOP vpcom intrinsics with fewer intrinsics that take the immediate ↵Craig Topper
as an argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158278 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-08Enable optimization for integer ABS on X86 if Subtarget has CMOV.Manman Ren
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158220 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-07X86: optimize generated code for integer ABSManman Ren
This patch will generate the following for integer ABS: movl %edi, %eax negl %eax cmovll %edi, %eax INSTEAD OF movl %edi, %ecx sarl $31, %ecx leal (%rdi,%rcx), %eax xorl %ecx, %eax There exists a target-independent DAG combine for integer ABS, which converts integer ABS to sar+add+xor. For X86, we match this pattern back to neg+cmov. This is implemented in PerformXorCombine. rdar://10695237 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158175 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-07Do not optimize the used bits of the x86 vselect condition operand, when the ↵Nadav Rotem
condition operand is a vector of 1-bit predicates. This may happen on MIC devices. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158168 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-07PR13046: we can't replace usage of SUB with CMP in the lowering phase.Manman Ren
It will cause assertion failure later on. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158160 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-07Use a base register instead of an index register with the local dynamic model.Rafael Espindola
Fixes pr13048. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158158 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-07X86: replace SUB with CMP if possibleManman Ren
This patch will optimize the following movq %rdi, %rax subq %rsi, %rax cmovsq %rsi, %rdi movq %rdi, %rax to cmpq %rsi, %rdi cmovsq %rsi, %rdi movq %rdi, %rax Perform this optimization if the actual result of SUB is not used. rdar: 11540023 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158126 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-06Revert r157755.Manman Ren
The commit is intended to fix rdar://11540023. It is implemented as part of peephole optimization. We can actually implement this in the SelectionDAG lowering phase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158122 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-06Remove unused private fields found by clang's new -Wunused-private-field.Benjamin Kramer
There are some that I didn't remove this round because they looked like obvious stubs. There are dead variables in gtest too, they should be fixed upstream. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158090 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-06Add support for dynamic stack realignment in the presence of dynamic allocas onChad Rosier
X86. rdar://11496434 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158087 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-06Mark several instructions SSE2 instead of SSE3 as they should be.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158049 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-05X86 itinerary properties.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157981 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-05whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157976 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-04Better comments for TLS-related X86 MachineOperand flags.Hans Wennborg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157920 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-04Add intrinsic forms for FMA instructions to opcode folding tables.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157917 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-04Add VFMADDSUB and VFMSUBADD FMA instructions to folding tables. Also add 213 ↵Craig Topper
forms of scalar FMA instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157914 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-03Rename FMA3 feature flag to just FMA to match gcc so it can be added to clang.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157903 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-03Rename fma4 intrinsics to just fma since they are now used for both FMA4 and ↵Craig Topper
FMA3. Autoupgrade support coming in a separate commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157898 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-03Revert r157831Manman Ren
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157896 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-03Use sse_load_f32/64 for scalar FMA3 intrinsic patterns instead of 128-bit ↵Craig Topper
loads to match instruction behavior. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157895 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-03Add neverHasSideEffects and mayLoad to FMA3 instructions.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157894 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-02Fix typos found by http://github.com/lyda/misspell-checkBenjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157885 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01Switch all register list clients to the new MC*Iterator interface.Jakob Stoklund Olesen
No functional change intended. Sorry for the churn. The iterator classes are supposed to help avoid giant commits like this one in the future. The TableGen-produced register lists are getting quite large, and it may be necessary to change the table representation. This makes it possible to do so without changing all clients (again). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157854 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01X86: peephole optimization to remove cmp instructionManman Ren
This patch will optimize the following: sub r1, r3 cmp r3, r1 or cmp r1, r3 bge L1 TO sub r1, r3 bge L1 or ble L1 If the branch instruction can use flag from "sub", then we can eliminate the "cmp" instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157831 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01Implement the local-dynamic TLS model for x86 (PR3985)Hans Wennborg
This implements codegen support for accesses to thread-local variables using the local-dynamic model, and adds a clean-up pass so that the base address for the TLS block can be re-used between local-dynamic access on an execution path. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157818 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01Enable automatic detection of FMA3 support to allow intrinsics to be used.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157805 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01Remove fadd(fmul) patterns for FMA3. This needs to be implemented by paying ↵Craig Topper
attention to FP_CONTRACT and matching @llvm.fma which is not available yet. This will allow us to enablle intrinsic use at least though. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157804 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01Add VFNSUB* instructions to folding table.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157802 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01Remove a trailing space and fix a comment.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157801 91177308-0d34-0410-b5e6-96231b3b80d8
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