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2012-08-31Add support for converting llvm.fma to fma4 instructions.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162999 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-31Clean up AddedComplexity further after adding UseSSExMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162973 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-31X86: Fix encoding of 'movd %xmm0, %rax'Jim Grosbach
The assembly string for the VMOVPQIto64rr instruction incorrectly lacked the 'v' prefix, resulting in mis-assembly of the vanilla movd instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162963 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-30Introduce 'UseSSEx' to force SSE legacy encodingMichael Liao
- Add 'UseSSEx' to force SSE legacy insn not being selected when AVX is enabled. As the penalty of inter-mixing SSE and AVX instructions, we need prevent SSE legacy insn from being generated except explicitly specified through some intrinsics. For patterns supported by both SSE and AVX, so far, we force AVX insn will be tried first relying on AddedComplexity or position in td file. It's error-prone and introduces bugs accidentally. 'UseSSEx' is disabled when AVX is turned on. For SSE insns inherited by AVX, we need this predicate to force VEX encoding or SSE legacy encoding only. For insns not inherited by AVX, we still use the previous predicates, i.e. 'HasSSEx'. So far, these insns fall into the following categories: * SSE insns with MMX operands * SSE insns with GPR/MEM operands only (xFENCE, PREFETCH, CLFLUSH, CRC, and etc.) * SSE4A insns. * MMX insns. * x87 insns added by SSE. 2 test cases are modified: - test/CodeGen/X86/fast-isel-x86-64.ll AVX code generation is different from SSE one. 'vcvtsi2sdq' cannot be selected by fast-isel due to complicated pattern and fast-isel fallback to materialize it from constant pool. - test/CodeGen/X86/widen_load-1.ll AVX code generation is different from SSE one after fixing SSE/AVX inter-mixing. Exec-domain fixing prefers 'vmovapd' instead of 'vmovaps'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162919 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-30Only perform DAG combine on FMAs of legal types.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162892 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-30Fix PR13727Michael Liao
- The root cause is that target constant materialization in X86 fast-isel creates a PC-rel addressing which may overflow 32-bit range in non-Small code model if .rodata section is allocated too far away from code segment in MCJIT, which uses Large code model so far. - Follow the similar logic to fix non-Small code model in fast-isel by skipping non-Small code model. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162881 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-29Make helper function static.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162843 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-29Convert FMA4 patterns to use target specific nodes instead of intrinsics to ↵Craig Topper
align with FMA3. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162829 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-28Typo.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162807 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-28Add comments on the literal value used.Michael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162805 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-28Explicitly update the number of nodes to be traversedMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162780 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-28The commutative flag is already correctly set within the multiclass. If we setBill Wendling
it here, then a 'register-memory' version would wrongly get the commutative flag. <rdar://problem/12180135> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162741 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-28Convert V_SETALLONES/AVX_SETALLONES/AVX2_SETALLONES to Post-RA pseudos.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162740 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-28Merge AVX_SET0PSY/AVX_SET0PDY/AVX2_SET0 into a single post-RA pseudo.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162738 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-28Fix PR12312Michael Liao
- Add a target-specific DAG optimization to recognize a pattern PTEST-able. Such a pattern is a OR'd tree with X86ISD::OR as the root node. When X86ISD::OR node has only its flag result being used as a boolean value and all its leaves are extracted from the same vector, it could be folded into an X86ISD::PTEST node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162735 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-28More missing mayLoad flags on AVX multiclasses.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162714 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-27Remove MMX shift intrinsic handling code that also exists in ↵Craig Topper
SelectionDAGBuilder. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162661 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-27Don't allow vextractf128 to be folded with unaligned stores. We don't fold ↵Craig Topper
unaligned loads so shouldn't fold unaligned stores as it can cause an alignment fault to occur. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162658 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-27Fold some patterns into instruction definitons so tablegen can infer flags ↵Craig Topper
removing the need for an explicit 'neverHasSideEffects = 1' git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162656 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-27Add HasAVX1Only predicate and use it for patterns that have an AVX1 ↵Craig Topper
instruction and an AVX2 instruction rather than relying on AddedComplexity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162654 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-24Fix integer undefined behavior due to signed left shift overflow in LLVM.Richard Smith
Reviewed offline by chandlerc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162623 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-24Add missing mayLoad flags to a large class of AVX *_Int instructions.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162622 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-24Mark X86::RET and RETI instructions as variadic.Jakob Stoklund Olesen
There is special magic happening when returning floating point values on the x87 stack. The RET instructions get extra f80 operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162592 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-24Remove more mayLoad workarounds.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162556 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-24Custom lower FMA intrinsics to target specific nodes and remove the patterns.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162534 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-24Remove some spurious mayLoad = 0 flags.Jakob Stoklund Olesen
They were inserted to silence TableGen's warning about redundant properties. That warning is now gone. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162517 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-24X86MemBarrier has unmodeled side effects.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162514 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-23Preserve operand flags in convertToThreeAddress() by copying operands.Jakob Stoklund Olesen
No test case, this is a generalization of r160260. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162485 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-23Favor FMA3 over FMA4 if both are enabled.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162454 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-23Use a switch statement instead of a bunch of if-else checks and pull out the ↵Craig Topper
common function call. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162428 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-22[ms-inline asm] Avoid a false positive assertionChad Rosier
Assertion failed: (Start.isValid() == End.isValid() && "Start and end should either both be valid or both be invalid!") when parsing inline asm. SMLoc assumes that the first char * in the source is invalid. However, when parsing an inline asm the mnemonic is at this location. I don't want to change SMLoc, so use a trivial workaround. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162381 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-22Add a getName function to MachineFunction. Use it in places that previously ↵Craig Topper
did getFunction()->getName(). Remove includes of Function.h that are no longer needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162347 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-22Don't cache the MBB in the class. Its only used by one function. Change a ↵Craig Topper
for loop over operands to use unsigned instead of int. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162344 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-22Mark a function as static since it doesn't use anything in the class.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162342 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Fix unaligned memory accesses when performing relocations in X86 JIT. There'sRichard Smith
no cost to using memcpy here: the fixed code is optimized by LLVM to perfect machine code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162311 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21[ms-inline asm] Do not report a Parser error when matching inline assembly.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162306 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21[ms-inline asm] Expose the ErrorInfo from the MatchInstructionImpl. In general,Chad Rosier
this is the index of the operand that failed to match. Note: This may cause a buildbot failure due to an API mismatch in clang. Should recover with my next commit to clang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162295 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Fix up indentation and remove a couple else's after returns.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162270 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Use uint16_t for tables of opcodes.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162267 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Fix up indentation. No functional change.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162264 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Add a couple llvm_unreachables. Add a message to several others.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162263 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Replace a break with llvm_unreachable in the default case of a nested ↵Craig Topper
switch. Condense code a bit. No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162261 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Cleanup the scalar FMA3 definitions. Add patterns to fold loads with scalar ↵Craig Topper
forms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162260 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Merge FMA3 instructions with and without patterns into single classes using ↵Craig Topper
null_frag. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162257 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-20fix a case where all operands of BUILD_VECTOR are undefinedMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162214 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-20Remove FMA3 intrinsic instructions in favor of patterns.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162194 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-20Use correct intrinsic for 256-bit VFMSUBADDPS.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162193 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-19Remove trailing white space and tab characters. No functional change.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162192 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-19When unsafe math is used, we can use commutative FMAX and FMIN. In some casesNadav Rotem
this allows for better code generation. Added a new DAGCombine transformation to convert FMAX and FMIN to FMANC and FMINC, which are commutative. For example: movaps %xmm0, %xmm1 movsd LC(%rip), %xmm0 minsd %xmm1, %xmm0 becomes: minsd LC(%rip), %xmm0 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162187 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18Reapply r162160 with a fix: Optimize Arith->Trunc->SETCC sequence to allow ↵Nadav Rotem
better compare/branch code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162172 91177308-0d34-0410-b5e6-96231b3b80d8
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