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2012-10-02Revert 165057, per Jim's request. This requires further discussion.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165069 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02Make sure to put our sret argument into %rax on x86-64. Fixes PR13563!Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165063 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02[ms-inline asm] Add basic support for wildcard MCParsedAsmOperands. This typeChad Rosier
of operand is specific to MS-style inline assembly and should not be generated when parsing normal assembly. The purpose of the wildcard operands are to allow the AsmParser to match multiple instructions (i.e., MCInsts) to a given ms-style asm statement. For the time being the matcher just returns the first match. This patch only implements wildcard matches for memory operands. Support for register wildcards will be added in the near future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165057 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02Don't use a debug location for frame setup instructions in theEric Christopher
prologue. Also skip frame setup instructions when looking for the first location. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165052 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02Use the existing DebugLoc.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165051 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02Make the location a parameter since we may not want the next oneEric Christopher
in the block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165050 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02Remove the SavePoint infrastructure from fast isel, replaceEric Christopher
with just an insert point from the MachineBasicBlock and let the location be updated as we access it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165049 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02Support for generating ELF objects on Windows.Andrew Kaylor
This adds 'elf' as a recognized target triple environment value and overrides the default generated object format on Windows platforms if that value is present. This patch also enables MCJIT tests on Windows using the new environment value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165030 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-01[ms-inline asm] Add the convertToMapAndConstraints() function that is used toChad Rosier
map constraints and MCInst operands to inline asm operands. This replaces the getMCInstOperandNum() function. The logic to determine the constraints are not in place, so we still default to a register constraint (i.e., "r"). Also, we no longer build the MCInst but rather return just the opcode to get the MCInstrDesc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164979 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-01Use constants for all return values in switch. Allows clang to optimize it ↵Craig Topper
into a lookup table. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164926 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-30Change getX86SubSuperRegister to take an MVT::SimpleValueType rather than an ↵Craig Topper
EVT and add llvm_unreachable to the switches. Helps it compile to dramatically better code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164919 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-28X86: when replacing SUB with TEST in ISelDAGToDAG, only replace uses of theManman Ren
second output of SUB with first output of TEST. PR13966 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164835 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. ↵Sylvestre Ledru
See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164768 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27Fix a typo 'iff' => 'if'Sylvestre Ledru
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164767 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26Remove the `hasFnAttr' method from Function.Bill Wendling
The hasFnAttr method has been replaced by querying the Attributes explicitly. No intended functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164725 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26X86_32: Large Symbol+Offset relocations.Jim Grosbach
If the offset is more than 24-bits, it won't fit in a scattered relocation offset field, so we fall back to using a non-scattered relocation. rdar://12358909 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164724 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26Add SARX/SHRX/SHLX code generation supportMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164675 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26Add RORX code generation supportMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164674 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26Add MULX code generation supportMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164673 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26Remove hasNoAVX method. Can just invert hasAVX instead.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164664 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26Add 'lock' prefix output support in assembly printerMichael Liao
- Instead of embedding 'lock' into each mnemonic of atomic instructions except 'xchg', we teach X86 assembly printer to output 'lock' prefix similar to or consistent with code emitter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164659 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-25Add missing i64 max/min/umax/umin on 32-bit targetMichael Liao
- Turn on atomic6432.ll and add specific test case as well git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164616 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-25Consistently specify the assembly variant to MatchInstructionImpl.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164611 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-25Fix an illegal tailcall opt where the callee returns a double via xmm while ↵Evan Cheng
caller returns x86_fp80 via st0. rdar://12229511 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164588 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-24Mark jump tables in code sections with DataRegion directives.Jim Grosbach
Even out-of-line jump tables can be in the code section, so mark them as data-regions for those targets which support the directives. rdar://12362871&12362974 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164571 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-24Rather then have a wrapper function, have tblgen instantiate the implementation.Chad Rosier
Also remove an unused argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164567 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-24Rather then have a wrapper function, have tblgen instantiate the implementation.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164548 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-22Fix 16-bit atomic inst encoding and keep pseudo-inst starting with '#'Michael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164453 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-22Fix typo in r164357Michael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164452 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21[ms-inline asm] Expose the mnemonicIsValid() function in the AsmParser.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164420 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21Add comment.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164415 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21Fix a typo in r164357Michael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164372 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21Add missing i8 max/min/umax/umin supportMichael Liao
- Fix PR5145 and turn on test 8-bit atomic ops git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164358 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21Revise td of X86 atomic instructionsMichael Liao
- Rewirte most atomic instructions in templates for both better maintenance and future extensions, such as HLE in TSX. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164357 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20Re-work X86 code generation of atomic ops with spin-loopMichael Liao
- Rewrite/merge pseudo-atomic instruction emitters to address the following issue: * Reduce one unnecessary load in spin-loop previously the spin-loop looks like thisMBB: newMBB: ld t1 = [bitinstr.addr] op t2 = t1, [bitinstr.val] not t3 = t2 (if Invert) mov EAX = t1 lcs dest = [bitinstr.addr], t3 [EAX is implicit] bz newMBB fallthrough -->nextMBB the 'ld' at the beginning of newMBB should be lift out of the loop as lcs (or CMPXCHG on x86) will load the current memory value into EAX. This loop is refined as: thisMBB: EAX = LOAD [MI.addr] mainMBB: t1 = OP [MI.val], EAX LCMPXCHG [MI.addr], t1, [EAX is implicitly used & defined] JNE mainMBB sinkMBB: * Remove immopc as, so far, all pseudo-atomic instructions has all-register form only, there is no immedidate operand. * Remove unnecessary attributes/modifiers in pseudo-atomic instruction td * Fix issues in PR13458 - Add comprehensive tests on atomic ops on various data types. NOTE: Some of them are turned off due to missing functionality. - Revise tests due to the new spin-loop generated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164281 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19Unify the logic in SelectAtomicLoadAdd and SelectAtomicLoadArithMichael Liao
- Merge the processing of LOAD_ADD with other atomic load-arith operations - Separate the logic getting target constant for atomic-load-op and add an optimization for atomic-load-add on i16 with negative value - Optimize a minor case for atomic-fetch-add i16 with negative operand. Test case is revised. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164243 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19Remove code for setting the VEX L-bit as a function of operand size from the ↵Craig Topper
code emitters and the disassembler table builder. Fix a couple instructions that were still missing VEX_L. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164204 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19Add explicit VEX_L tags to all 256-bit instructions. This will allow us to ↵Craig Topper
remove code from the code emitters that examined operands to set the L-bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164202 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-18When creating MCAsmBackend pass the CPU string as well. In X86AsmBackendRoman Divacky
store this and use it to not emit long nops when the CPU is geode which doesnt support them. Fixes PR11212. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164132 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-17Add some cases to x86 OptimizeCompare to handle DEC and INC, too.Jan Wen Voung
While we are setting the earlier def to true, also make it live. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164056 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-17LLVM_ATTRIBUTE_USED forces emission of a function. To silence unused ↵Benjamin Kramer
function warnings use LLVM_ATTRIBUTE_UNUSED. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164036 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-16The PMOVZXWD family of functions had patterns extends narrow vector types to ↵Nadav Rotem
wide vector types. It had patterns for zext-loading and extending. This commit adds patterns for loading a wide type, performing a bitcast, and extending. This is an odd pattern, but it is commonly used when writing code with intrinsics. rdar://11897677 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163995 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-15Use LLVM_DELETED_FUNCTION in place of 'DO NOT IMPLEMENT' comments.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163974 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-15X86: Emitting x87 fsin/fcos for sinf/cosf is not safe without unsafe fp math.Benjamin Kramer
This was only an issue if sse is disabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163967 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Fix Doxygen issues:Dmitri Gribenko
* wrap code blocks in \code ... \endcode; * refer to parameter names in paragraphs correctly (\arg is not what most people want -- it starts a new paragraph); * use \param instead of \arg to document parameters in order to be consistent with the rest of the codebase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163902 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-13Fix commentMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163835 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-13Add wider vector/integer support for PR12312Michael Liao
- Enhance the fix to PR12312 to support wider integer, such as 256-bit integer. If more than 1 fully evaluated vectors are found, POR them first followed by the final PTEST. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163832 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-13Fix the TCRETURNmi64 bug differently.Jakob Stoklund Olesen
Add a PatFrag to match X86tcret using 6 fixed registers or less. This avoids folding loads into TCRETURNmi64 using 7 or more volatile registers. <rdar://problem/12282281> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163819 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-13Revert r163761 "Don't fold indexed loads into TCRETURNmi64."Jakob Stoklund Olesen
The patch caused "Wrong topological sorting" assertions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163810 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-13Add a new compression type to ModRM table that detects when the memory modRM ↵Craig Topper
byte represent 8 instructions and the reg modRM byte represents up to 64 instructions. Reduces modRM table from 43k entreis to 25k entries. Based on a patch from Manman Ren. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163774 91177308-0d34-0410-b5e6-96231b3b80d8
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