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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84931 91177308-0d34-0410-b5e6-96231b3b80d8
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be performed by the post-RA scheduler. The default is none.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84911 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84431 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84425 91177308-0d34-0410-b5e6-96231b3b80d8
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stack slots and giving them different PseudoSourceValue's did not fix the
problem of post-alloc scheduling miscompiling llvm itself.
- Apply Dan's conservative workaround by assuming any non fixed stack slots can
alias other memory locations. This means a load from spill slot #1 cannot
move above a store of spill slot #2.
- Enable post-alloc scheduling for x86 at optimization leverl Default and above.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84424 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84273 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84200 91177308-0d34-0410-b5e6-96231b3b80d8
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the global variable list only happen for COFF targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82010 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80892 91177308-0d34-0410-b5e6-96231b3b80d8
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whether sse is available. Just use consult subtarget.
No functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80880 91177308-0d34-0410-b5e6-96231b3b80d8
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conditional moves as a subtarget feature. This is the easy part of
PR4841.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80763 91177308-0d34-0410-b5e6-96231b3b80d8
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instead of X86 Subtarget. This elimianates dependencies on
X86Subtarget from X86TAI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78746 91177308-0d34-0410-b5e6-96231b3b80d8
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Module*.
Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77918 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75276 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75275 91177308-0d34-0410-b5e6-96231b3b80d8
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"stub style pic in dynamic-no-pic" mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75273 91177308-0d34-0410-b5e6-96231b3b80d8
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elimiantes the last use of GVRequiresExtraLoad, so delete it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75244 91177308-0d34-0410-b5e6-96231b3b80d8
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need for other purposes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75243 91177308-0d34-0410-b5e6-96231b3b80d8
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is just a trivial wrapper around "ClassifyGlobalReference", which
stole a ton of logic from LowerGlobalAddress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75237 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75232 91177308-0d34-0410-b5e6-96231b3b80d8
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more complex and slow than just directly testing what we care about.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75231 91177308-0d34-0410-b5e6-96231b3b80d8
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split its handling out to PCRelGVRequiresExtraLoad, and simplify code
based on this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75230 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75229 91177308-0d34-0410-b5e6-96231b3b80d8
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code which conflated RIPRel PIC with x86-64. Fix these to just check for X86-64
directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75092 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74428 91177308-0d34-0410-b5e6-96231b3b80d8
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initialization problems.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74350 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73836 91177308-0d34-0410-b5e6-96231b3b80d8
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- added processors k8-sse3, opteron-sse3, athlon64-sse3, amdfam10, and
barcelona with appropriate sse3/4a levels
- added FeatureSSE4A for amdfam10 processors
in X86Subtarget:
- added hasSSE4A
- updated AutoDetectSubtargetFeatures to detect SSE4A
- updated GetCurrentX86CPU to detect family 15 with sse3 as k8-sse3 and
family 10h as amdfam10
New processor names match those used by gcc.
Patch by Paul Redmond!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72434 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72335 91177308-0d34-0410-b5e6-96231b3b80d8
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relocation mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72160 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61715 91177308-0d34-0410-b5e6-96231b3b80d8
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processors. These are significantly slower than a load followed by a bt of a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61557 91177308-0d34-0410-b5e6-96231b3b80d8
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especially in the case of addresses computed from loop induction
variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61075 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60609 91177308-0d34-0410-b5e6-96231b3b80d8
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being both a namespace and a variable name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60208 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56888 91177308-0d34-0410-b5e6-96231b3b80d8
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`-fno-builtin' flag. Currently, it's used to replace "memset" with "_bzero"
instead of "__bzero" on Darwin10+. This arguably violates the meaning of this
flag, but is currently sufficient. The meaning of this flag should become more
specific over time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56885 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50649 91177308-0d34-0410-b5e6-96231b3b80d8
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the code being generated does not require an executable stack.
Also, add target-specific code to make use of this on Linux
on x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50634 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49158 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49129 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49048 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48691 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47002 91177308-0d34-0410-b5e6-96231b3b80d8
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mode.
Before:
_main:
subq $8, %rsp
leaq _X(%rip), %rax
movsd 8(%rax), %xmm1
movss _X(%rip), %xmm0
call _t
xorl %ecx, %ecx
movl %ecx, %eax
addq $8, %rsp
ret
Now:
_main:
subq $8, %rsp
movsd _X+8(%rip), %xmm1
movss _X(%rip), %xmm0
call _t
xorl %ecx, %ecx
movl %ecx, %eax
addq $8, %rsp
ret
Notice there is another idiotic codegen issue that needs to be fixed asap:
xorl %ecx, %ecx
movl %ecx, %eax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46850 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46681 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45494 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
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Now both subtarget define getMaxInlineSizeThreshold and the expansion uses it.
This should not change generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43552 91177308-0d34-0410-b5e6-96231b3b80d8
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The x86-64 ABI states that objects passed on the stack have
8 byte alignment. Implement that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41768 91177308-0d34-0410-b5e6-96231b3b80d8
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