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path: root/lib/Target/X86/X86InstrSystem.td
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2011-10-07Add X86 disassembler support for RDFSBASE, RDGSBASE, WRFSBASE, and WRGSBASE.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141358 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07Add X86 disassembler support for XSAVE, XRSTOR, and XSAVEOPT.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141354 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22Fix register printing in disassembling of push/pop of segment registers and ↵Craig Topper
in/out in Intel syntax mode. Fixes PR10960 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140299 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30Recognize the xstorerng alias for VIA PadLock's xstore instruction.Joerg Sonnenberger
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134126 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-09fix rdar://8735979 - "int 3" doesn't match to "int3". Unfortunately,Chris Lattner
InstAlias doesn't allow matching immediate operands, so we have to write C++ code to do this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129223 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04Add support for the VIA PadLock instructions.Joerg Sonnenberger
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128826 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-04PR9377: Handle x86 str with register operand in a way consistent with gas.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126970 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-22Implement xgetbv and xsetbv.Rafael Espindola
Patch by Jai Menon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126165 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Added the x86 instruction ud2b (2nd official undefined instruction).Kevin Enderby
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117485 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22Reverting r117031 to cleanup valgrind errors.Andrew Trick
It doesn't look like anything is wrong with the checkin, but the new test cases expose a mem bug in AsmParser. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117087 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21More tweaks to X86 instructions to allow the 'w' suffix in places it makesKevin Enderby
sense, when the instruction takes the 16-bit ax register or m16 memory location. These changes to llvm-mc matches what the darwin assembler allows for these instructions. Also added the missing flex (without the wait prefix) and ud2a as an alias to ud2 (still to add ud2b). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117031 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19Added a few tweaks to the Intel Descriptor-table support instructions to allowKevin Enderby
word forms and suffixed versions to match the darwin assembler in 32-bit and 64-bit modes. This is again for use just with assembly source for llvm-mc . git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116773 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-05move the atomic pseudo instructions out to X86InstrCompiler.tdChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115599 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-05continue moving stuff out to X86InstrSystem.td. MoveChris Lattner
control flow stuff out to X86InstrControl.td. Move some compiler pseudo instructions and Pat<> patterns out to X86InstrCompiler.td git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115596 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-05refactor .td files a bit, moving system instructions out to X86InstrSystem.tdChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115591 91177308-0d34-0410-b5e6-96231b3b80d8
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