| Age | Commit message (Expand) | Author |
|---|
| 2008-04-16 | Add support for the form of the SSE41 extractps instruction that | Dan Gohman |
| 2008-04-10 | Fix the x86-64 side of PR2108 by adding a v2f64 version of | Chris Lattner |
| 2008-04-05 | Favors pshufd over shufps when shuffling elements from one vector. pshufd is ... | Evan Cheng |
| 2008-03-26 | Fix some SSE4.1 instruction encoding bugs. | Evan Cheng |
| 2008-03-24 | - SSE4.1 extractfps extracts a f32 into a gr32 register. Very useful! Not. Fi... | Evan Cheng |
| 2008-03-16 | Add a couple missing SSE4 instructions | Nate Begeman |
| 2008-03-15 | Replace all target specific implicit def instructions with a target independe... | Evan Cheng |
| 2008-03-14 | Fix some 80 col violations. | Evan Cheng |
| 2008-03-14 | Fix a number of encoding bugs. SSE 4.1 instructions MPSADBWrri, PINSRDrr, etc... | Evan Cheng |
| 2008-03-12 | Clean up my own mess. | Evan Cheng |
| 2008-03-08 | Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} ... | Evan Cheng |
| 2008-03-05 | isTwoAddress = 1 -> Constraints. | Evan Cheng |
| 2008-03-05 | PSLLWri etc. are two-address instructions. | Evan Cheng |
| 2008-02-18 | - When DAG combiner is folding a bit convert into a BUILD_VECTOR, it should c... | Evan Cheng |
| 2008-02-16 | llvm.memory.barrier, and impl for x86 and alpha | Andrew Lenharth |
| 2008-02-12 | SSE4.1 64b integer insert/extract pattern support | Nate Begeman |
| 2008-02-11 | Enable SSE4 codegen and pattern matching. | Nate Begeman |
| 2008-02-10 | xmm0 variable blends | Nate Begeman |
| 2008-02-09 | memopv16i8 had wrong alignment requirement, would have broken pabsb | Nate Begeman |
| 2008-02-09 | Skeleton of insert and extract matching, more to come | Nate Begeman |
| 2008-02-04 | The rest of the SSE4.1 intrinsic patterns that are obvious to me. Getting | Nate Begeman |
| 2008-02-04 | Some more SSE 4.1 intrinsic patterns. | Nate Begeman |
| 2008-02-03 | SSE 4.1 Intrinsics and detection | Nate Begeman |
| 2008-01-24 | Significantly simplify and improve handling of FP function results on x86-32. | Chris Lattner |
| 2008-01-11 | add some missing flags. | Chris Lattner |
| 2008-01-10 | Start inferring side effect information more aggressively, and fix many bugs ... | Chris Lattner |
| 2008-01-10 | remove explicit sets of 'neverHasSideEffects' that can now be | Chris Lattner |
| 2008-01-06 | rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. | Chris Lattner |
| 2007-12-29 | Remove attribution from file headers, per discussion on llvmdev. | Chris Lattner |
| 2007-12-20 | Fix JIT encoding for CMPSD as well. | Evan Cheng |
| 2007-12-17 | Add "mayHaveSideEffects" and "neverHasSideEffects" flags to some instructions. I | Bill Wendling |
| 2007-12-16 | Fix the JIT encoding of cmp*ss, which aborts with this assertion currently: | Chris Lattner |
| 2007-12-15 | Make better use of instructions that clear high bits; fix various 2-wide shuf... | Evan Cheng |
| 2007-12-12 | Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materia... | Evan Cheng |
| 2007-12-06 | Remove a bogus optimization. It's not possible to do a move to low element to... | Evan Cheng |
| 2007-11-25 | Fix a long standing deficiency in the X86 backend: we would | Chris Lattner |
| 2007-11-17 | Add support for vectors to int <-> float casts. | Nate Begeman |
| 2007-10-30 | Add missing SSE builtins: CVTPD2PI, CVTPS2PI, | Dale Johannesen |
| 2007-10-12 | Corrected many typing errors. And removed 'nest' parameter handling | Arnold Schwaighofer |
| 2007-10-11 | Add missing argument to PALIGNR | Dale Johannesen |
| 2007-10-06 | Added DAG xforms. e.g. | Evan Cheng |
| 2007-10-01 | Typo. X86comi doesn't read / write chain's. | Evan Cheng |
| 2007-09-29 | Enabling new condition code modeling scheme. | Evan Cheng |
| 2007-09-25 | Added support for new condition code modeling scheme (i.e. physical register ... | Evan Cheng |
| 2007-09-23 | Fix PR 1681. When X86 target uses +sse -sse2, | Dale Johannesen |
| 2007-09-14 | Add implicit def of EFLAGS on those instructions that may modify flags. | Evan Cheng |
| 2007-09-11 | Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead. | Evan Cheng |
| 2007-09-07 | Avoid storing and reloading zeros and other constants from stack slots | Dan Gohman |
| 2007-08-30 | Mark load instructions with isLoad = 1. | Evan Cheng |
| 2007-08-11 | 64-bit SSSE3 ops that use MMX registers don't require 16-byte alignment. | Bill Wendling |
