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path: root/lib/Target/X86/X86InstrInfo.cpp
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2006-04-03- More efficient extract_vector_elt with shuffle and movss, movsd, movd, etc.Evan Cheng
- Some bug fixes and naming inconsistency fixes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27377 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24Support for scalar to vector with zero extension.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27091 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21- Remove scalar to vector pseudo ops. They are just wrong.Evan Cheng
- Handle FR32 to VR128:v4f32 and FR64 to VR128:v2f64 with aliases of MOVAPS and MOVAPD. Mark them as move instructions and *hope* they will be deleted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26919 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-161. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. ThisEvan Cheng
proves to be worth 20% on Ptrdist/ks. Might be related to dependency breaking support. 2. Added FsMOVAPSrr and FsMOVAPDrr as aliases to MOVAPSrr and MOVAPDrr. These are used for FR32 / FR64 reg-to-reg copies. 3. Tell reg-allocator to generate MOVSSrm / MOVSDrm and MOVSSmr / MOVSDmr to spill / restore FsMOVAPSrr and FsMOVAPDrr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26241 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02fix operand numbersChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25915 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far ↵Chris Lattner
more logical place. Other methods should also be moved if anyoneis interested. :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25913 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01Tell codegen MOVAPSrr and MOVAPDrr are copies.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25889 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14Properly split f32 and f64 into separate register classes for scalar sse fpNate Begeman
fixing a bunch of nasty hackery git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23735 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-16Teach the register allocator that movaps is also a move instructionNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22451 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-06First round of support for doing scalar FP using the SSE2 ISA extension andNate Begeman
XMM registers. There are many known deficiencies and fixmes, which will be addressed ASAP. The major benefit of this work is that it will allow the LLVM register allocator to allocate FP registers across basic blocks. The x86 backend will still default to x87 style FP. To enable this work, you must pass -enable-sse-scalar-fp and either -sse2 or -sse3 to llc. An example before and after would be for: double foo(double *P) { double Sum = 0; int i; for (i = 0; i < 1000; ++i) Sum += P[i]; return Sum; } The inner loop looks like the following: x87: .LBB_foo_1: # no_exit fldl (%esp) faddl (%eax,%ecx,8) fstpl (%esp) incl %ecx cmpl $1000, %ecx #FP_REG_KILL jne .LBB_foo_1 # no_exit SSE2: addsd (%eax,%ecx,8), %xmm0 incl %ecx cmpl $1000, %ecx #FP_REG_KILL jne .LBB_foo_1 # no_exit git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22340 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-21* Remove trailing whitespaceMisha Brukman
* Convert tabs to spaces git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21426 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19When commuting these instructions, make sure to actually swap the operands too.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19694 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19Improve coverage of the X86 instruction set by adding 16-bit shift doubles.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19687 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19Teach the code generator that shrd/shld is commutable if it has an immediate.Chris Lattner
This allows us to generate this: foo: mov %EAX, DWORD PTR [%ESP + 4] mov %EDX, DWORD PTR [%ESP + 8] shld %EDX, %EDX, 2 shl %EAX, 2 ret instead of this: foo: mov %EAX, DWORD PTR [%ESP + 4] mov %ECX, DWORD PTR [%ESP + 8] mov %EDX, %EAX shrd %EDX, %ECX, 30 shl %EAX, 2 ret Note the magically transmogrifying immediate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19686 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-02Disable 2->3 address promotion of add and inc instructions to LEA's. InChris Lattner
addition to being three address, LEA's don't set the flags. This fixes 186.crafty. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19251 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-02Implement the convertToThreeAddress method, add support for inverting JP/JNPChris Lattner
branches. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19247 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01Fix a warningChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15409 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-31Align breaks.Alkis Evlogimenos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15371 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-31Add breaksChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15365 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-31Simplify code a bit.Alkis Evlogimenos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15364 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-31Correctly spell 'unconditional'.Alkis Evlogimenos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15363 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-31Implement insertGoto and reverseBranchCondition for the X86.Alkis Evlogimenos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15362 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29A big X86 instruction rename. The instructions are renamed to makeAlkis Evlogimenos
their names more decriptive. A name consists of the base name, a default operand size followed by a character per operand with an optional special size. For example: ADD8rr -> add, 8-bit register, 8-bit register IMUL16rmi -> imul, 16-bit register, 16-bit memory, 16-bit immediate IMUL16rmi8 -> imul, 16-bit register, 16-bit memory, 8-bit immediate MOVSX32rm16 -> movsx, 32-bit register, 16-bit memory git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11995 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29Adjust to change in TII ctor argumentsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11987 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29These two virtual methods are never called.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11984 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-22Move MOTy::UseType enum into MachineOperand. This eliminates theAlkis Evlogimenos
switch statements in the constructors and simplifies the implementation of the getUseType() member function. You will have to specify defs using MachineOperand::Def instead of MOTy::Def though (similarly for Use and UseAndDef). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11715 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-13Remove getAllocatedRegNum(). Use getReg() instead.Alkis Evlogimenos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11393 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-10Don't use MachineOperator::is(Phys|Virt)RegisterChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11276 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-10Tighten up checksChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11274 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-01FpMOV is also a move instruction.Alkis Evlogimenos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11055 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-28Add TargetInstrInfo::isMoveInstr() to support coalescing in registerAlkis Evlogimenos
allocation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10633 91177308-0d34-0410-b5e6-96231b3b80d8
2003-11-11Put all LLVM code into the llvm namespace, as per bug 109.Brian Gaeke
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9903 91177308-0d34-0410-b5e6-96231b3b80d8
2003-10-20Added LLVM project notice to the top of every C++ source file.John Criswell
Header files will be on the way. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9298 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-03* Start using tablegen'd instruction descriptionsChris Lattner
* Fix bug in the createNOP method, which was not marking the operands of the generated XCHG as useanddef. I don't think this method is actually used, so it wasn't breaking anything, but it should be fixed anyway... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7539 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-24Reword to remove reference to how things worked in the past.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6323 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-24Implement the TargetInstrInfo's createNOPinstr() and isNOPinstr() interface.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6320 91177308-0d34-0410-b5e6-96231b3b80d8
2003-01-14Rename MachineInstrInfo -> TargetInstrInfoChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5272 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-18Add comments, switch uses/defs to match InstrInfo.def fileChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5102 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-03* Move information about Implicit Defs/Uses into X86InstrInfo.def.Chris Lattner
* Expose information about implicit defs/uses of register through the MachineInstrInfo.h file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4877 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-22Added -*- C++ -*- mode to the comments.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4826 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-18Expose base opcodeChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4742 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-18Start to add more information to instr.defChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4741 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17Reorganize printing interface a bitChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4728 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-30Set the destination register field based on the target specific flagsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4442 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-29Rename X86InstructionInfo to X86InstrInfoChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4413 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-29Minor renamingChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4410 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-29Implement MachineInstrInfo interfaceChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4394 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-25Initial checkin of X86 backend.Chris Lattner
We can instruction select exactly one instruction 'ret void'. Wow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4284 91177308-0d34-0410-b5e6-96231b3b80d8
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