llvm - http://llvm.org

Age	Commit message (Expand)	Author
2013-03-26	Annotate the remaining x86 instructions with SchedRW lists.	Jakob Stoklund Olesen
2013-03-19	Annotate X86InstrExtension.td with SchedRW lists.	Jakob Stoklund Olesen
2012-07-30	Mark MOVZX16/MOVSX16 as neverHasSideEffects/mayLoad	Craig Topper
2012-07-30	Mark MOVZX32_NOREX as isCodeGenOnly and neverHasSideEffects. The isCodeGenOnl...	Craig Topper
2012-02-29	Intel Atom instruction itineraries for mov sign extension and mov zero extens...	Andrew Trick
2012-02-18	Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...	Jia Liu
2011-10-07	Constrain both operands on MOVZX32_NOREXrr8.	Jakob Stoklund Olesen
2011-05-20	Re-commit 131641 with fixes; de-pseudoize MOVSX16rr8 and friends.	Stuart Hastings
2011-05-19	Reverting 131641 to investigate 'bot complaint.	Stuart Hastings
2011-05-19	Revise MOVSX16rr8/MOVZX16rr8 (and rm variants) to no longer be	Stuart Hastings
2010-11-01	make the asm matcher emitter reject instructions that have comments	Chris Lattner
2010-10-31	two changes: make the asmmatcher generator ignore ARM pseudos properly,	Chris Lattner
2010-10-05	add new file	Chris Lattner