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path: root/lib/Target/X86/AsmParser/X86AsmParser.cpp
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2010-09-15add various broken forms of fnstsw. I didn't add the %raxChris Lattner
version because it adds a prefix and makes even less sense than the other broken forms. This wraps up rdar://8431422 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113932 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-15add some aliases for f[u]comi, part of rdar://8431422Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113930 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-15add a bunch of aliases for fp operations with no operand,Chris Lattner
rdar://8431422 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113929 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-15Diagnose invalid instructions like "incl" with "too few operands for ↵Chris Lattner
instruction" instead of crashing. This fixes: rdar://8431815 - crash when invalid operand is one that isn't present git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113921 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-14add a terrible hack to allow out with dx is parens, a gas bug.Chris Lattner
This fixes PR8114 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113894 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-11add a missed cmov alias, part of rdar://8416805Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113693 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-11add support for all the setCC aliases. Part of rdar://8416805Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113692 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-11add support for pushfd/popfd which are aliases for pushfl/popfl.Chris Lattner
This fixes rdar://8408129 - pushfd and popfd get invalid instruction mnemonic errors git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113690 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-11implement rdar://8407928 - support for in/out with a missing "a" register.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113689 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-11fix the asmparser so that the target is responsible for skipping toChris Lattner
the end of the line on a parser error, allowing skipping to happen for syntactic errors but not for semantic errors. Before we would miss emitting a diagnostic about the second line, because we skipped it due to the semantic error on the first line: foo %eax bar %al This fixes rdar://8414033 - llvm-mc ignores lines after an invalid instruction mnemonic errors git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113688 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08fix rdar://8407548, I missed the commuted form of xchg/test without a suffix.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113427 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08fix bugs in push/pop segment support, rdar://8407242Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113422 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08add support for the commuted form of the test instruction, rdar://8018260.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113352 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08implement proper support for sysret{,l,q}, rdar://8403907Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113350 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08implement the iret suite of instructions properly,Chris Lattner
fixing rdar://8403974 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113349 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08add support for instruction prefixes on the same line as the instruction,Chris Lattner
implementing rdar://8033482 and PR7254. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113348 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08change the MC "ParseInstruction" interface to make it the Chris Lattner
implementation's job to check for and lex the EndOfStatement marker. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113347 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08gas accepts xchg <mem>, <reg> as a synonym for xchg <reg>, <mem>.Chris Lattner
Add this to the mc assembler, fixing PR8061 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113346 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08fix the encoding of the "jump on *cx" family of instructions,Chris Lattner
rdar://8061602 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113343 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07Don't leak the old operand when transforming "sldt" into "sldtw".Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113200 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07add missing cmov aliases, this resolves rdar://8208499Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113189 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06remove duplicated entryChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113188 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06"sldt <mem>" is ambiguous in 64-bit mode, but shouldChris Lattner
always be disambiguated as sldtw. sldtw and sldtq with a mem operands have the same effect, but sldtw is more compact. Force it to sldtw, resolving rdar://8017530 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113186 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06fix rdar://8017621 - llvm-mc can't guess encoding for "push $(1000)"Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113184 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06in the case where an instruction only has one implementationChris Lattner
of a mneumonic, report operand errors with better location info. For example, we now report: t.s:6:14: error: invalid operand for instruction cwtl $1 ^ but we fail for common cases like: t.s:11:4: error: invalid operand for instruction addl $1, $1 ^ because we don't know if this is supposed to be the reg/imm or imm/reg form. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113178 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06Now that we know if we had a total fail on the instruction mnemonic, Chris Lattner
give a more detailed error. Before: t.s:11:4: error: unrecognized instruction addl $1, $1 ^ t.s:12:4: error: unrecognized instruction f2efqefa $1 ^ After: t.s:11:4: error: invalid operand for instruction addl $1, $1 ^ t.s:12:4: error: invalid instruction mnemonic 'f2efqefa' f2efqefa $1 ^ This fixes rdar://8017912 - llvm-mc says "unrecognized instruction" when it means "invalid operands" git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113176 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06simplify the hacks around jrcxz.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113167 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06have tblgen detect when an instruction would have matched, butChris Lattner
failed because a subtarget feature was not enabled. Use this to remove a bunch of hacks from the X86AsmParser for rejecting things like popfl in 64-bit mode. Previously these hacks weren't needed, but were important to get a message better than "invalid instruction" when used in the wrong mode. This also fixes bugs where pushal would not be rejected correctly in 32-bit mode (just pusha). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113166 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06change MatchInstructionImpl to return an enum instead of bool.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113165 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06have AsmMatcherEmitter.cpp produce the hunk of code that gets includedChris Lattner
into the middle of the class, and rework how the different sections of the generated file are conditionally included for simplicity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113163 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06random cleanupsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113157 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24MC/X86: Tweak imul recognition, previous hack only applies for the imul formDaniel Dunbar
taking immediates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111950 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24MC/X86: Add custom hack for recognizing "imul $12, %eax" and friends.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111947 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24MC/X86: Warn on scale factors > 1 without index register, instead of erroring,Daniel Dunbar
for 'as' compatibility. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111945 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-18remove some code that is dead now that lea's are modeled with segment registers.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111343 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12MC/X86/AsmParser: Give an explicit error message when we reject an instructionDaniel Dunbar
because it could have an ambiguous suffix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110890 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12MC/AsmParser: Push the burdon of emitting diagnostics about unmatchedDaniel Dunbar
instructions onto the target specific parser, which can do a better job. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110889 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11MCAsmParser: Add dump() hook to MCParsedAsmOperand.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110790 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-24Support x86 "eiz" and "riz" pseudo index registers in the assembler.Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109295 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23Remove trailing whitespaceBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109276 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23Add AVX version of CLMUL instructionsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109248 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19MC/X86: We now match instructions like "incl %eax" correctly for the arch we areDaniel Dunbar
assembling; remove crufty custom cleanup code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108681 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19TblGen/AsmMatcher: Add support for honoring instruction Requires<[]> ↵Daniel Dunbar
attributes as part of the matcher. - Currently includes a hack to limit ourselves to "In32BitMode" and "In64BitMode", because we don't have the other infrastructure to properly deal with setting SSE, etc. features on X86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108677 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19Target: Give the TargetAsmParser access to the TargetMachine.Daniel Dunbar
- Unfortunate, but necessary for now to handle subtarget instruction matching. Eventually we should factor out the lower level target machine information so we don't need to do this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108664 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-14Don't pass StringRef by reference.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108366 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-13Added a check that pusha cannot be encoded in 64-bit mode.Kevin Enderby
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108265 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-07Add more assembly opcodes for SSE compare instructionsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107823 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24Teach the x86 mc assembler that %dr6 = %db6, this implementsChris Lattner
rdar://8013734 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106725 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23Add tests for different AVX cmp opcodes, also teach the x86 asm parser to ↵Bruno Cardoso Lopes
understand the vcmp instruction git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106678 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-08Incremental improvement to the handling of the x86 "Jump if rCX Zero"Kevin Enderby
instruction. Added the 64-bit version "jrcxz" so it is recognized and also added the checks for incorrect uses of "jcxz" in 64-bit mode and "jrcxz" in 32-bit mode. Still to do is to correctly handle the encoding of the instruction adding the Address-size override prefix byte, 0x67, when the width of the count register is not the same as the mode the machine is running in. Which for example means the encoding of "jecxz" depends if you are assembling as a 32-bit target or a 64-bit target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105661 91177308-0d34-0410-b5e6-96231b3b80d8
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