Age | Commit message (Expand) | Author |
2006-07-19 | Add code size to target instruction use it as the 3rd isel sorting tie-breaker. | Evan Cheng |
2006-05-18 | Added a Flags field to TargetOperandInfo. Currently the only flag is | Evan Cheng |
2006-05-18 | Remove CalleeSavedRegisters from class Target. | Evan Cheng |
2006-05-17 | Remove PointerType from class Target | Evan Cheng |
2006-05-16 | Replace "../whatever.td" with "whatever.td", so that out-of-tree backends | Vladimir Prus |
2006-05-15 | Improve comment, patch provided by Vladimir Prus! | Chris Lattner |
2006-05-14 | Update comment. | Chris Lattner |
2006-05-01 | Put PHI/INLINEASM into the correct namespace. | Chris Lattner |
2006-04-19 | Renamed AddedCost to AddedComplexity. | Evan Cheng |
2006-04-19 | Allow "let AddedCost = n in" to increase pattern complexity. | Evan Cheng |
2006-03-24 | Add support for dwarf register numbering. | Jim Laskey |
2006-03-24 | Shuffle some includes around | Chris Lattner |
2006-03-03 | Split the valuetypes out of Target.td into ValueTypes.td | Chris Lattner |
2006-03-01 | New type v2f32. | Evan Cheng |
2006-02-20 | Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit | Evan Cheng |
2006-01-27 | Subtarget feature can now set any variable to any value | Evan Cheng |
2006-01-27 | PHI and INLINEASM are now built-in instructions provided by Target.td | Chris Lattner |
2006-01-09 | New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace | Evan Cheng |
2005-12-26 | Added field noResults to Instruction. | Evan Cheng |
2005-12-23 | * Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead. | Evan Cheng |
2005-12-14 | Added support to specify predicates. | Evan Cheng |
2005-12-04 | * Added instruction property hasCtrlDep for those which r/w control-flow | Evan Cheng |
2005-12-01 | Support multiple ValueTypes per RegisterClass, needed for upcoming vector | Nate Begeman |
2005-11-29 | Add the majority of the vector machien value types we expect to support, | Nate Begeman |
2005-11-29 | refix typo | Chris Lattner |
2005-11-29 | revert my change for the time being, which broke the build | Chris Lattner |
2005-11-28 | fix a typo :) | Chris Lattner |
2005-11-19 | Capture more operand info, patch by Evan Cheng | Chris Lattner |
2005-11-18 | Also add the new vector value type here, for completeness. | Nate Begeman |
2005-10-26 | Add attribute name and type to SubtargetFeatures. | Jim Laskey |
2005-10-21 | Plugin new subtarget backend into the build. | Jim Laskey |
2005-10-19 | Added InstrSchedClass to each of the PowerPC Instructions. | Jim Laskey |
2005-10-19 | Push processor descriptions to the top of target and add command line info. | Jim Laskey |
2005-10-10 | Pull DAG ISel generation nodes out of the PowerPC backend to where they | Chris Lattner |
2005-10-04 | Add a forward def | Chris Lattner |
2005-09-30 | Now that self referential classes are supported, get rid of a work-around. | Chris Lattner |
2005-08-26 | spell this right | Chris Lattner |
2005-08-26 | Add a flag | Chris Lattner |
2005-08-25 | add an enum value | Chris Lattner |
2005-08-19 | Split RegisterClass 'Methods' into MethodProtos and MethodBodies | Chris Lattner |
2005-08-19 | Require that targets specify a namespace for their register classes. | Chris Lattner |
2005-08-18 | Add a new flag | Chris Lattner |
2005-01-02 | Add some bits that can be set for instructions. | Chris Lattner |
2004-10-14 | Add isLittleEndianEncoding to InstrInfo class, defaults to `off' | Misha Brukman |
2004-10-03 | Add initial support for variants | Chris Lattner |
2004-09-28 | Add support for the isLoad and isStore flags, needed by the instruction sched... | Nate Begeman |
2004-09-28 | Capture delay slot info | Chris Lattner |
2004-09-14 | Revamp the Register class, and allow the use of the RegisterGroup class to | Chris Lattner |
2004-08-21 | Add two values | Chris Lattner |
2004-08-15 | isdummyclass goes away | Chris Lattner |