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path: root/lib/Target/Target.td
AgeCommit message (Expand)Author
2006-07-19Add code size to target instruction use it as the 3rd isel sorting tie-breaker.Evan Cheng
2006-05-18Added a Flags field to TargetOperandInfo. Currently the only flag isEvan Cheng
2006-05-18Remove CalleeSavedRegisters from class Target.Evan Cheng
2006-05-17Remove PointerType from class TargetEvan Cheng
2006-05-16Replace "../whatever.td" with "whatever.td", so that out-of-tree backendsVladimir Prus
2006-05-15Improve comment, patch provided by Vladimir Prus!Chris Lattner
2006-05-14Update comment.Chris Lattner
2006-05-01Put PHI/INLINEASM into the correct namespace.Chris Lattner
2006-04-19Renamed AddedCost to AddedComplexity.Evan Cheng
2006-04-19Allow "let AddedCost = n in" to increase pattern complexity.Evan Cheng
2006-03-24Add support for dwarf register numbering.Jim Laskey
2006-03-24Shuffle some includes aroundChris Lattner
2006-03-03Split the valuetypes out of Target.td into ValueTypes.tdChris Lattner
2006-03-01New type v2f32.Evan Cheng
2006-02-20Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bitEvan Cheng
2006-01-27Subtarget feature can now set any variable to any valueEvan Cheng
2006-01-27PHI and INLINEASM are now built-in instructions provided by Target.tdChris Lattner
2006-01-09New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replaceEvan Cheng
2005-12-26Added field noResults to Instruction.Evan Cheng
2005-12-23* Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.Evan Cheng
2005-12-14Added support to specify predicates.Evan Cheng
2005-12-04* Added instruction property hasCtrlDep for those which r/w control-flowEvan Cheng
2005-12-01Support multiple ValueTypes per RegisterClass, needed for upcoming vectorNate Begeman
2005-11-29Add the majority of the vector machien value types we expect to support,Nate Begeman
2005-11-29refix typoChris Lattner
2005-11-29revert my change for the time being, which broke the buildChris Lattner
2005-11-28fix a typo :)Chris Lattner
2005-11-19Capture more operand info, patch by Evan ChengChris Lattner
2005-11-18Also add the new vector value type here, for completeness.Nate Begeman
2005-10-26Add attribute name and type to SubtargetFeatures.Jim Laskey
2005-10-21Plugin new subtarget backend into the build.Jim Laskey
2005-10-19Added InstrSchedClass to each of the PowerPC Instructions.Jim Laskey
2005-10-19Push processor descriptions to the top of target and add command line info.Jim Laskey
2005-10-10Pull DAG ISel generation nodes out of the PowerPC backend to where theyChris Lattner
2005-10-04Add a forward defChris Lattner
2005-09-30Now that self referential classes are supported, get rid of a work-around.Chris Lattner
2005-08-26spell this rightChris Lattner
2005-08-26Add a flagChris Lattner
2005-08-25add an enum valueChris Lattner
2005-08-19Split RegisterClass 'Methods' into MethodProtos and MethodBodiesChris Lattner
2005-08-19Require that targets specify a namespace for their register classes.Chris Lattner
2005-08-18Add a new flagChris Lattner
2005-01-02Add some bits that can be set for instructions.Chris Lattner
2004-10-14Add isLittleEndianEncoding to InstrInfo class, defaults to `off'Misha Brukman
2004-10-03Add initial support for variantsChris Lattner
2004-09-28Add support for the isLoad and isStore flags, needed by the instruction sched...Nate Begeman
2004-09-28Capture delay slot infoChris Lattner
2004-09-14Revamp the Register class, and allow the use of the RegisterGroup class toChris Lattner
2004-08-21Add two valuesChris Lattner
2004-08-15isdummyclass goes awayChris Lattner