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2003-05-29Since there is now another derived .inc file, ignore them all.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6411 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-29Use an absolute path to TableGen because not everyone (e.g. automatic tester)Misha Brukman
has their path set up by this point. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6410 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-29When TableGen finds an error in the SparcV9.td file, it exits with a non-zeroMisha Brukman
exit code. This, in turn, makes an empty file SparcV9CodeEmitter.inc, and only much later, produces a link error because the key function that TableGen creates isn't found. Using a temporary file in the middle forces a good .INC file to be generated by TableGen, and it will keep trying until you fix the input file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6392 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-29Fixed to use the correct format of the instruction.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6390 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-29This should work better with re-generating the SparcV9CodeEmitter.inc file.Misha Brukman
Also, added a rule to delete the generated .inc file on `make clean'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6389 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-29* Broke up SparcV9.td into separate files as it was getting unmanageableMisha Brukman
* Added some Format 4 classes, but not instructions * Added notes on missing sections with FIXMEs * Added RDCCR instr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6388 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-28Fixed ordering of elements in instructions: although the binary instructionsMisha Brukman
list (rd, rs1, imm), in that order (bit-wise), the actual assembly syntax is instr rd, imm, rs1, and that is how they are constructed in the instruction selector. This fixes the discrepancy. Also fixed some comments along the same lines and fixed page numbers referring to where instructions are described in the Sparc manual. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6384 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-28Add dependency to make TableGen rule fire.Brian Gaeke
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6383 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27Fixed an error preventing compilation.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6381 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27Added the 'r' and 'i' annotations to instructions as their opcode names haveMisha Brukman
changed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6380 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27Keep track of the current BasicBlock being processed so that a referencingMisha Brukman
MachineInstr can later be patched up correctly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6378 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27Added 'r' and 'i' annotations to instructions as SparcInstr.def has changed.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6377 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.Misha Brukman
Non-obvious change: since I have changed ST and STD to be STF and STDF to (a) closer resemble their name (NOT assembly text) in the Sparc manual, and (b) clearly specify that they they are floating-point opcodes, I made the same changes in this file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6376 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.Misha Brukman
Here I had to make one non-trivial change: add a function to get a version of the opcode that takes an immediate, given an opcode that takes all registers. This is required because sometimes it is not known at construction time which opcode is used because opcodes are passed around between functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6375 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6373 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27Added entries for each of the instructions with annotations ('r' or 'i').Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6372 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27One of the first major changes to make the work of JITting easier: addingMisha Brukman
annotations on instructions to specify which format they are (i.e., do they take 2 registers and 1 immediate or just 3 registers) as that changes their binary representation and hence, code emission. This makes instructions more like how X86 defines them to be. Now, writers of instruction selection must choose the correct opcode based on what instruction type they are building, which they already know. Thus, the JIT doesn't have to do the same work by `discovering' which operands an instruction really has. As this involves lots of small changes to a lot of files in lib/target/Sparc, I'll commit them individually because otherwise the diffs will be unreadable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6371 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27* Allow passing in an unsigned configuration to allocateSparcTargetMachine()Misha Brukman
a default value is set in the header file. * Fixed some code layout to make it more consistent with the rest of codebase * Added addPassesToJITCompile() with relevant passes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6369 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27Moved generation of the SparcV9CodeEmitter.inc file higher in the Makefile soMisha Brukman
that Makefile.common would see it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6367 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27Add prototypes to add passes to JIT compilation and code emission.Misha Brukman
Also, added annotations to how instructions are modified (reg/imm operands). Added prototype for adding register numbers to values pass for interfacing with the target-independent register allocators in the JIT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6366 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27Broke out class definition from SparcV9CodeEmitter, and added ability to take aMisha Brukman
MachineCodeEmitter to make a pass-through debugger -- output to memory and to std::cerr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6363 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27SparcV9CodeEmitter.cpp is a part of the Sparc code emitter. The main functionMisha Brukman
that assembles instructions is generated via TableGen (and hence must be built before building this directory, but that's already the case in the top-level Makefile). Also added is .cvsignore to ignore the generated file `SparcV9CodeEmitter.inc', which is included by SparcV9CodeEmitter.cpp . git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6357 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27Added definitions for a bunch of floating-point instructions.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6356 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()Vikram S. Adve
and related functions and flags. Fixed several bugs where only "isDef" was being checked, not "isDefAndUse". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6342 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27(1) Added special register class containing (for now) %fsr.Vikram S. Adve
Fixed spilling of %fcc[0-3] which are part of %fsr. (2) Moved some machine-independent reg-class code to class TargetRegInfo from SparcReg{Class,}Info. (3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly() and related functions and flags. Fixed several bugs where only "isDef" was being checked, not "isDefAndUse". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6341 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27Added special register class containing (for now) %fsr.Vikram S. Adve
Fixed spilling of %fcc[0-3] which are part of %fsr. Moved some machine-independent reg-class code to class TargetRegInfo from SparcReg{Class,}Info. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6339 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-25Bug fix: right shift for int divide-by-power-of-2 was incorrect forVikram S. Adve
negative values. Need to add one to a negative value before right shift! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6334 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-25Bug fix: padding bytes within a structure should go after each field!Vikram S. Adve
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6333 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-25Bug fix: sign-extension was not happening for C = -MININT since C == -C!Vikram S. Adve
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6332 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-25Add support for compiling varargs functions.Vikram S. Adve
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6325 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-24Reword to remove reference to how things worked in the past.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6323 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-24Implement the TargetInstrInfo's createNOPinstr() and isNOPinstr() interface.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6320 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-23Cleaned up code layout; no functional changes.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6312 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-22Cleaned up code layout. No functional changes.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6304 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-22Kill `using' directives.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6301 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-21Fixed `volatile' typo.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6266 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-21Cleaned up code layout, spacing, etc. for readability purposes and to be moreMisha Brukman
consistent with the style of LLVM's code base (and itself! it's inconsistent in some places.) No functional changes were made. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6265 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-21Cleaned up code layout, spacing, etc. for readability purposes and to be moreMisha Brukman
consistent with the style of LLVM's code base (and itself! it's inconsistent in some places.) No functional changes were made. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6262 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-21Namespacified `vector' and `cerr' to always use the `std::' namespace.Misha Brukman
Eliminated `using' directives. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6261 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-20The word `operands' has an `r' in it.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6250 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-20Sparc instruction opcodes now all live under the `V9' namespace.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6249 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-12Remove wierd printoutChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6145 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-07Added the initial version of the TableGen description for the Sparc backend.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6021 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-01Eliminate use of NonCopyable so that doxygen documentation doesn't linkChris Lattner
the Annotation classes with the noncopyable classes for no reason git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5973 91177308-0d34-0410-b5e6-96231b3b80d8
2003-04-26Remove two fields from TargetData which are target specific.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5963 91177308-0d34-0410-b5e6-96231b3b80d8
2003-04-26IntegerRegSize is always 8 for sparcChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5961 91177308-0d34-0410-b5e6-96231b3b80d8
2003-04-25Fix obvious type-oChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5932 91177308-0d34-0410-b5e6-96231b3b80d8
2003-04-24Trivial cleanupChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5899 91177308-0d34-0410-b5e6-96231b3b80d8
2003-04-23Remove unneccesary &*Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5871 91177308-0d34-0410-b5e6-96231b3b80d8
2003-04-23Add support for the Switch instruction by running the lowerSwitch pass firstChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5867 91177308-0d34-0410-b5e6-96231b3b80d8
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