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2003-07-29Add const version of getLiveRangeForValue().Vikram S. Adve
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7386 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-29Code to insert caller-saves moved here from SparcRegInfo: it is nowVikram S. Adve
machine-independent. Fix problem with using branch operand reg. as temp. reg. when spilling values used by an instruction in the delay slot of the branch (which will eventually be moved before the branch). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7385 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-29* Correctly emit a far call if the target address does not fit into 30 bitsMisha Brukman
instead of assert()ing * Fixed a nasty bug where '07' was used instead of register 'o7' git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7382 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-28Specify the value type for the register, not just the size.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7357 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-26Making this code const-correct would be a pain, so I'll hack it.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7350 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-26Be const correctChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7348 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-26Hrm, another necesary one :(Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7347 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-26This code doesn't modify the LLVM structure, keep stuff constChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7343 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-26Remove #includeChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7342 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-26Remove extraneous #includesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7341 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-25(1) Major fix to the way unused regs. are marked and found for the FPVikram S. Adve
Single and FP double reg types (which share the same reg class). Now all methods marking/finding unused regs consider the regType within the reg class, and SparcFloatRegClass specializes this code. (2) Remove machine-specific regalloc. methods that are no longer needed. In particular, arguments and return value from a call do not need machine-specific code for allocation. (3) Rename TargetRegInfo::getRegType variants to avoid unintentional overloading when an include file is omitted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7334 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-251. Fix a case that was marking the invalid reg. num. (-1) as used,Vikram S. Adve
causing a nasty array bound error later. 2. Fix silly typo causing logical shift of unsigned long to use SRL instead of SRLX. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7330 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-25(1) Change the way unused regs. are marked and found to consider regTypeVikram S. Adve
info (since multiple reg types may share the same reg class). (2) Remove machine-specific regalloc. methods that are no longer needed. In particular, arguments and return value from a call do not need machine-specific code for allocation. (3) Rename TargetRegInfo::getRegType variants to avoid unintentional overloading when an include file is omitted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7329 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-25Remove unused field. Change the way unused regs. are marked andVikram S. Adve
found to consider regType info (since multiple reg types may share the same reg class, e.g., single and double on Sparc). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7327 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-23Remove redundant const qualifiers from cast<> expressionsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7253 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-23Simplify code by using ConstantInt::getRawValue instead of checking to seeChris Lattner
whether the constant is signed or unsigned, then casting git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7252 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-23Remove unnecessary castsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7250 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-23Random cleanupsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7247 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-23Remove using declChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7246 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-21Simplify code a bitChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7217 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-20Added special consideration for instrumentation strategyAnand Shukla
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7208 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-16Fixed the number translation scheme for the integer condition code registers: itMisha Brukman
now works in instructions which require a 2-bit or 3-bit INTcc code. Incidentally, that means that the representation of INTcc registers is now the same in both integer and FP instructions. Thus, code became much simpler and cleaner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7185 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-16The name should really be `simm11' to follow the naming convention, but this hasMisha Brukman
no change in functionality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7184 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-15No need for a second immediate field if the class already inherits one.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7182 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-15Encode predict = 1 by default, because the Sparc assembler does this.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7181 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-15Correctly handle calls to functions which are further away than 2**32 bits willMisha Brukman
allow, i.e. make a sequence of instructions to enable an indirect call using jump-and-link and 2 temporary registers (which we save and ultimately restore). Warning: if the delay slot of a function call is used to do meaningful work and not just a NOP, this behavior is incorrect. However, the Sparc backend does not yet utilize the delay slots effectively, so it is not necessary to make an overly complicated algorithm for something that's not used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7178 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-14* Added support for the %ccr registerMisha Brukman
* FP double registers are now coded correctly * Removed function which converted registers based on register types, it was broken (because regTypes are broken) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7175 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-14The word `separate' only has one `e'.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7173 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-10Several important bug fixes:Vikram S. Adve
(1) Cannot use ANDN(ot), ORN, and XORN for boolean ops, only bitwise ops. (2) Conditional move instructions must distinguish signed and unsigned condition codes, e.g., MOVLE vs. MOVLEU. (3) Conditional-move-on-register was using the cond-move-on-cc opcodes, which produces a valid-looking instruction with bogus registers! (4) Here's a really cute one: dividing-by-2^k for negative numbers needs to add 2^k-1 before shifting, not add 1 after shifting. Sadly, these are the same when k=0 so our poor test case worked fine. (5) Casting between signed and unsigned values was not correct: completely reimplemented. (6) Zero-extension on unsigned values was bogus: I was only doing the SRL and not the SLLX before it. Don't know WHAT I was thinking! (7) And the most important class of changes: Sign-extensions on signed values. Signed values are not sign-extended after ordinary operations, so they must be sign-extended before the following cases: -- passing to an external or unknown function -- returning from a function -- using as operand 2 of DIV or REM -- using as either operand of condition-code setting operation (currently only SUBCC), with smaller than 32-bit operands Also, a couple of improvements: (1) Fold cast-to-bool into Not(bool). Need to do this for And, Or, XOR also. (2) Convert SetCC-Const into a conditional-move-on-register (case 41) if the constant is 0. This was only being done for branch-on-SetCC-Const when the branch is folded with the SetCC-Const. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7159 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-10Bug fix in creating constants: need 1U << 31, not 1 << 31.Vikram S. Adve
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7158 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-10Fold cast-to-bool into not. Later, this should also be folded into otherVikram S. Adve
boolean operations: AND, OR, XOR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7157 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-10Values stored in CallArgsDescriptor cannot be const.Vikram S. Adve
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7156 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-10isMarkedForSpill() should be const.Vikram S. Adve
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7155 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-10Print out all neighbors in interference graph, not just higher-numbered ones.Vikram S. Adve
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7153 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-10Several fixes to handling of int CC register:Vikram S. Adve
(1) An int CC live range must be spilled if there are any interferences, even if no other "neighbour" in the interf. graph has been allocated that reg. yet. This is actually true of any class with only one reg! (2) SparcIntCCRegClass::colorIGNode sets the color even if the LR must be spilled so that the machine-independent spill code doesn't have to make the machine-dependent decision of which CC name to use based on operand type: %xcc or %icc. (These are two halves of the same register.) (3) LR->isMarkedForSpill() is no longer the same as LR->hasColor(). These should never have been the same, and this is necessary now for #2. (4) All RDCCR and WRCCR instructions are directly generated with the phony number for %ccr so that EmitAssembly/EmitBinary doesn't have to deal with this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7152 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-10Several fixes to handling of int CC register:Vikram S. Adve
(1) An int CC live range must be spilled if there are any interferences, even if no other "neighbour" in the interf. graph has been allocated that reg. yet. This is actually true of any class with only one reg! (2) SparcIntCCRegClass::colorIGNode sets the color even if the LR must be spilled so that the machine-independent spill code doesn't have to make the machine-dependent decision of which CC name to use based on operand type: %xcc or %icc. (These are two halves of the same register.) (3) LR->isMarkedForSpill() is no longer the same as LR->hasColor(). These should never have been the same, and this is necessary now for #2. (4) All RDCCR and WRCCR instructions are directly generated with the phony number for %ccr so that EmitAssembly/EmitBinary doesn't have to deal with this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7151 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-07Elaborated assembly syntax of instructions in the comments.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7120 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-07Removed unnecessary assignment (it was taken care by a superclass) and clarifiedMisha Brukman
some comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7119 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-07Moved RegClassIDs enum to be next to the RegTypes enum.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7114 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-06Correction to last fix: Pointer types do not return true in Type::IsIntegral().Vikram S. Adve
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7113 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-06Choose register instead of immediate for ConstantExpr in ChooseRegOrImmed.Vikram S. Adve
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7112 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-06Major bug fix though it happened rarely (only on a compare after anVikram S. Adve
integer overflow): We need to use %icc and not %xcc for comparisons on 32-bit or smaller integer values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7111 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-06Make the RegClassID values public -- there is no other way to get them.Vikram S. Adve
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7109 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-03Apparently, the "regType" and "regClass" used in the Sparc backend are not bothMisha Brukman
correct: empirically, "regType" is wrong for a number of registers. Thus, one can only rely on the "regClass" to figure out what kind of register one is dealing with. This change switches to using only "regClass" and adds a few extra DEBUG() print statements and a few clean-ups in comments and code, mostly minor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7103 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-02* Force all "don't care" bits to 0 so that there are absolutely no unset bits inMisha Brukman
the TableGen descriptions; all unset bits are thus errors. * As a result, found and fixed instructions where some operands were not actually assigned into the right portion of the instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7074 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-02The classes F4_3 and F4_4 have an `rd' operand that needs to be set.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7073 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-02Properly fix instruction syntax in comments, using `imm' for instructions thatMisha Brukman
use an immediate value instead of a register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7072 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-02Fixed instruction syntax in the comments (specifies how instr is used).Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7071 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-02Force fixed-size but large alloca objects to the dynamically allocatedVikram S. Adve
area to avoid using up precious stack space within the 4095 offset limit from %fp. Such objects that would themselves live at a large offset were being put there already so this is a simple change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7066 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-02Minor beautification: fold a couple of lines of code.Vikram S. Adve
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7054 91177308-0d34-0410-b5e6-96231b3b80d8
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