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2008-11-11Separate sparc asmprinter. This should unbreak the native buildAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59047 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05Eliminate the ISel priority queue, which used the topological order for aDan Gohman
priority function. Instead, just iterate over the AllNodes list, which is already in topological order. This eliminates a fair amount of bookkeeping, and speeds up the isel phase by about 15% on many testcases. The impact on most targets is that AddToISelQueue calls can be simply removed. In the x86 target, there are two additional notable changes. The rule-bending AND+SHIFT optimization in MatchAddress that creates new pre-isel nodes during isel is now a little more verbose, but more robust. Instead of either creating an invalid DAG or creating an invalid topological sort, as it has historically done, it can now just insert the new nodes into the node list at a position where they will be consistent with the topological ordering. Also, the address-matching code has logic that checked to see if a node was "already selected". However, when a node is selected, it has all its uses taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any further visits from MatchAddress. This code is now removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-27Have TableGen emit setSubgraphColor calls under control of a -gen-debugDavid Greene
flag. Then in a debugger developers can set breakpoints at these calls to see waht is about to be selected and what the resulting subgraph looks like. This really helps when debugging instruction selection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58278 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18Teach DAGCombine to fold constant offsets into GlobalAddress nodes,Dan Gohman
and add a TargetLowering hook for it to use to determine when this is legal (i.e. not in PIC mode, etc.) This allows instruction selection to emit folded constant offsets in more cases, such as the included testcase, eliminating the need for explicit arithmetic instructions. This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp that attempted to achieve the same effect, but wasn't as effective. Also, fix handling of offsets in GlobalAddressSDNodes in several places, including changing GlobalAddressSDNode's offset from int to int64_t. The Mips, Alpha, Sparc, and CellSPU targets appear to be unaware of GlobalAddress offsets currently, so set the hook to false on those targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-16Const-ify several TargetInstrInfo methods.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57622 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-14Rename LoadX to LoadExt.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57526 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-14Fix command-line option printing to print two spaces where needed,Dan Gohman
instead of requiring all "short description" strings to begin with two spaces. This makes these strings less mysterious, and it fixes some cases where short description strings mistakenly did not begin with two spaces. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57521 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-11Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's asChris Lattner
parameters instead of raw Constants. This prevents the constants from being selected by the isel pass, fixing PR2735. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57385 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10Fix a thinko and unbreak sparc default CCAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57368 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10Extend set of return registers on sparc until someone will implement MRV ↵Anton Korobeynikov
support there. At least, this will allow libgcc compile, however we are not ABI-compatible with stuff compiled with native gcc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57364 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10Ignore extra 'r' modifier for nowAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57363 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10Use expand for smul_lohi for nowAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57362 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10Add rudimentary support for 'r' register operandAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57359 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10CleanupAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57358 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10Add rudimentary asmprinter support for printing inline asm operands for sparc.Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57346 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10Add dummy 'm' inline asm constraint handler for Sparc. I'm not sure, whether ↵Anton Korobeynikov
it is correct, however :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57345 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-10CleanupAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57344 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-03Avoid creating two TargetLowering objects for each target.Dan Gohman
Instead, just create one, and make sure everything that needs it can access it. Previously most of the SelectionDAGISel subclasses all had their own TargetLowering object, which was redundant with the TargetLowering object in the TargetMachine subclasses, except on Sparc, where SparcTargetMachine didn't have a TargetLowering object. Change Sparc to work more like the other targets here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57016 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-03Switch the MachineOperand accessors back to the short names likeDan Gohman
isReg, etc., from isRegister, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-29Rename isWeakForLinker to mayBeOverridden. Use itDuncan Sands
instead of hasWeakLinkage in a bunch of optimization passes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56782 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-26CMake: Builds all targets.Oscar Fuentes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56641 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24Move actual section printing stuff to AsmPrinter from TAI reducing heap traffic.Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56573 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24Drop obsolete hook and change all usage to new interfaceAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56572 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-23Fix these enums' starting values to reflect the way thatDan Gohman
instruction opcodes are now numbered. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56497 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22Make log, log2, log10, exp, exp2 use Expand byDale Johannesen
default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56471 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16Reverting r56249. On further investigation, this functionality isn't needed.Bill Wendling
Apologies for the thrashing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56251 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16- Change "ExternalSymbolSDNode" to "SymbolSDNode".Bill Wendling
- Add linkage to SymbolSDNode (default to external). - Change ISD::ExternalSymbol to ISD::Symbol. - Change ISD::TargetExternalSymbol to ISD::TargetSymbol These changes pave the way to allowing SymbolSDNodes with non-external linkage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56249 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-13Remove isImm(), isReg(), and friends, in favor of Dan Gohman
isImmediate(), isRegister(), and friends, to avoid confusion about having two different names with the same meaning. I'm not attached to the longer names, and would be ok with changing to the shorter names if others prefer it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56189 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-13Define CallSDNode, an SDNode subclass for use with ISD::CALL.Dan Gohman
Currently it just holds the calling convention and flags for isVarArgs and isTailCall. And it has several utility methods, which eliminate magic 5+2*i and similar index computations in several places. CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle nodes that are not CSE'd gracefully. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56183 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12Rename ConstantSDNode::getValue to getZExtValue, for consistencyDan Gohman
with ConstantInt. This led to fixing a bug in TargetLowering.cpp using getValue instead of getAPIntValue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56159 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-04Tidy up several unbeseeming casts from pointer to intptr_t.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55779 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-04Add intrinsics for log, log2, log10, exp, exp2.Dale Johannesen
No functional change (and no FE change to generate them). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55753 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28erect abstraction boundaries for accessing SDValue members, rename Val -> ↵Gabor Greif
Node to reflect semantics git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55504 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-26Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy ↵Owen Anderson
requested was inserted or not. This allows bitcast in fast isel to properly handle the case where an appropriate reg-to-reg copy is not available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55375 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-23Move the point at which FastISel taps into the SelectionDAGISelDan Gohman
process up to a higher level. This allows FastISel to leverage more of SelectionDAGISel's infastructure, such as updating Machine PHI nodes. Also, implement transitioning from SDISel back to FastISel in the middle of a block, so it's now possible to go back and forth. This allows FastISel to hand individual CallInsts and other complicated things off to SDISel to handle, while handling the rest of the block itself. To help support this, reorganize the SelectionDAG class so that it is allocated once and reused throughout a function, instead of being completely reallocated for each block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55219 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21Simplify SelectRoot's interface, and factor out some common codeDan Gohman
from all targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55124 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21Use raw_ostream throughout the AsmPrinter.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55092 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-16Add interface for section override. Use this for Sparc, since it should use ↵Anton Korobeynikov
named BSS section. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54844 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-16Reduce heap trashing due to std::string construction / concatenation via ↵Anton Korobeynikov
caching of section flags string representations git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54842 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-14Convert uses of std::vector in TargetInstrInfo to SmallVector. This change ↵Owen Anderson
had to be propoagated down into all the targets and up into all clients of this API. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54802 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08Properly print flags on SparcAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54543 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08Use mergeable strings sections on sparcAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54541 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08Handle visibility printing with all generality. Remove bunch of duplicate code.Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54540 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07Use EmitAlignment consistentlyAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54456 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07CleanupAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54455 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07Switch Sparc to new section handling stuff. Refactor printing of ↵Anton Korobeynikov
module-level GVs significantly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54450 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-03Emit saveri with the correct operand order, patch by Richard Pennington!Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54313 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-27Rename SDOperand to SDValue.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17Add a new function, ReplaceAllUsesOfValuesWith, which handles bulkDan Gohman
replacement of multiple values. This is slightly more efficient than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically could be optimized even further. However, an important property of this new function is that it handles the case where the source value set and destination value set overlap. This makes it feasible for isel to use SelectNodeTo in many very common cases, which is advantageous because SelectNodeTo avoids a temporary node and it doesn't require CSEMap updates for users of values that don't change position. Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to handle operand lists more efficiently, and to correctly handle a number of corner cases to which its new wider use exposes it. This commit also includes a change to the encoding of post-isel opcodes in SDNodes; now instead of being sandwiched between the target-independent pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel opcodes are now represented as negative values. This makes it possible to test if an opcode is pre-isel or post-isel without having to know the size of the current target's post-isel instruction set. These changes speed up llc overall by 3% and reduce memory usage by 10% on the InstructionCombining.cpp testcase with -fast and -regalloc=local. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53728 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-10Fix the build by adding a #include.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53388 91177308-0d34-0410-b5e6-96231b3b80d8
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