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in the start of an array and a count of operands where applicable. In many
cases, the number of operands is known, so this static array can be allocated
on the stack, avoiding the heap. In many other cases, a SmallVector can be
used, which has the same benefit in the common cases.
I updated a lot of code calling getNode that takes a vector, but ran out of
time. The rest of the code should be updated, and these methods should be
removed.
We should also do the same thing to eliminate the methods that take a
vector of MVT::ValueTypes.
It would be extra nice to convert the dagiselemitter to avoid creating vectors
for operands when calling getTargetNode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29373 91177308-0d34-0410-b5e6-96231b3b80d8
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Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28797 91177308-0d34-0410-b5e6-96231b3b80d8
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RET chain, value1, sign1, value2, sign2, ...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28482 91177308-0d34-0410-b5e6-96231b3b80d8
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non-deterministic behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28454 91177308-0d34-0410-b5e6-96231b3b80d8
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by Anton Korobeynikov! This is a step towards closing PR786.
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This is part of the on-going work on PR 761.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28378 91177308-0d34-0410-b5e6-96231b3b80d8
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TargetData.h. This should make recompiles a bit faster with my current
TargetData tinkering.
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target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.
This fixes PR 759.
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basic block labels, consolidating the code to do so in one place for each
target.
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x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.
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letting the code generator handle them directly.
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manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks. The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.
This functionality is currently only enabled on x86, but should be safe for
every target. In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.
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Make the CBE and V9 backends create their own, since they're the only ones that use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26974 91177308-0d34-0410-b5e6-96231b3b80d8
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Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26628 91177308-0d34-0410-b5e6-96231b3b80d8
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implement copysign as a native op if they have it.
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CustomDAGSchedInserter
instructions are expensive.
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and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.
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and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.
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it, because this:
.bss
X:
.byte 0
results in the assembler warning: "initialization in bss segment". Annoying.
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The ABI specifies that there is a register save area at the bottom of the
stack, which means the actual used pointer needs to be an offset from
the subtracted value.
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CALLSEQ_START nodes.
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frameaddr/returnaddr
intrinsics.
Autogen frameindex matcher
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