| Age | Commit message (Expand) | Author |
|---|
| 2004-12-10 | Add the rest of the multiply instructions. | Brian Gaeke |
| 2004-11-23 | Add the rest of the logical instructions. | Brian Gaeke |
| 2004-11-21 | Add all the rest of the ADD and SUB variants, some of which are important for | Brian Gaeke |
| 2004-11-16 | Correct the implicit-defs information for indirect and direct calls. | Brian Gaeke |
| 2004-11-15 | Expand Defs to encompass all the possibly-call-clobbered regs. | Brian Gaeke |
| 2004-10-14 | The field is called `imm22', not simply `imm' | Misha Brukman |
| 2004-10-14 | Synthetic instructions RET and RETL need to have all 3 parameters specified | Misha Brukman |
| 2004-10-14 | Add FSTOI, FDTOI (fp to integer cast) instructions. | Brian Gaeke |
| 2004-10-10 | Model calls as *both* using *and* killing O0..O5, because callees use the | Brian Gaeke |
| 2004-09-30 | Mark the instructions that have delay slots with the hasDelaySlot flag. | Brian Gaeke |
| 2004-09-29 | Tell the target description that calls clobber registers O0...O5. | Brian Gaeke |
| 2004-09-29 | FITOD is spelled "fitod", not "fitos". Ouch. | Brian Gaeke |
| 2004-09-29 | Add new FpMOVD pseudo-instruction, used to move doubles around. | Brian Gaeke |
| 2004-09-22 | Combine the F2 and F3 instruction classes into one file for simplicity | Misha Brukman |
| 2004-08-09 | Remove ClassPrefix variable as it's no longer used. | Misha Brukman |
| 2004-08-09 | The (future) SparcV8 JIT would do well to have a class prefix. | Misha Brukman |
| 2004-07-31 | I'm pretty sure that ba is branch always, which is a barrier. Brg should | Chris Lattner |
| 2004-07-16 | Add a class for pseudo-instructions. Use it. | Brian Gaeke |
| 2004-07-08 | Add floating-point branches and compares. Compares don't complete | Brian Gaeke |
| 2004-06-27 | Add FITOS, FITOD, and F{ADD,SUB,MUL,DIV}{S,D}. | Brian Gaeke |
| 2004-06-24 | Add FSTOD and FDTOS conversion instructions. | Brian Gaeke |
| 2004-06-24 | Rename the load and store opcodes. The non-fp ones only have one | Brian Gaeke |
| 2004-06-18 | Fix jmpl. | Brian Gaeke |
| 2004-06-18 | Add load instructions for floating-point registers. | Brian Gaeke |
| 2004-06-17 | Set the isBranch and isTerminator flags on branch instructions correctly. | Brian Gaeke |
| 2004-05-08 | Add a bunch more branches | Brian Gaeke |
| 2004-05-08 | Add ADD with immediate | Brian Gaeke |
| 2004-05-08 | Add forms of CMP, SUBCC, and a few branches, and some comments. | Brian Gaeke |
| 2004-04-07 | andd subcc instructions which is used to create the 'cmp' pseudo instruction | Chris Lattner |
| 2004-04-07 | Fix encoding of existing shift instructions, add rr shifts | Chris Lattner |
| 2004-04-07 | Add a bunch more instructions | Chris Lattner |
| 2004-04-07 | Add UDIV, SDIV, and a few variants of WR. | Brian Gaeke |
| 2004-04-02 | Add load, store, and NOP instructions. | Brian Gaeke |
| 2004-03-16 | Add UMULrr and SMULrr instructions. | Brian Gaeke |
| 2004-03-06 | Sort stanzas into Sparc V8 book page number order. | Brian Gaeke |
| 2004-03-04 | Subtract instructions; minor cleanups | Brian Gaeke |
| 2004-03-04 | Simple copyConstantToReg support, SETHIi and ORri | Brian Gaeke |
| 2004-03-03 | Support add - note, still missing important copyConstantToRegister stuff | Brian Gaeke |
| 2004-02-28 | Tab completion is our friend. | Chris Lattner |
