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AgeCommit message (Expand)Author
2013-03-18R600/SI: implement indirect adressing for SIChristian Konig
2013-03-18R600/SI: add float vector typesChristian Konig
2013-03-18R600/SI: add shl patternChristian Konig
2013-03-18R600/SI: add BUFFER_LOAD_DWORD patternChristian Konig
2013-03-18R600/SI: implement SI.load.const intrinsicChristian Konig
2013-03-18R600/SI: enable all S_LOAD and S_BUFFER_LOAD opcodesChristian Konig
2013-03-18R600/SI: fix inserting waits for all definesChristian Konig
2013-03-14R600: Factorize code handling Const Read Port limitationVincent Lejeune
2013-03-13R600: Remove unused Outputs variableVincent Lejeune
2013-03-11R600: Fix JUMP handling so that MachineInstr verification can occurVincent Lejeune
2013-03-11R600MachineScheduler.cpp: Fix use cases of dbgs(). Don't include <iostream> h...NAKAMURA Takumi
2013-03-08R600: Optimize another selectcc caseTom Stellard
2013-03-08R600: Improve custom lowering of select_ccTom Stellard
2013-03-08R600: Change operation action from Custom to Expand for BR_CCTom Stellard
2013-03-08R600: Change operation action from Custom to Expand for SETCCTom Stellard
2013-03-08R600: Set BooleanContents to ZeroOrNegativeOneBooleanContentTom Stellard
2013-03-08R600/SI: Use source schedulerMichel Danzer
2013-03-07R600/SI: rework input interpolation v2Christian Konig
2013-03-07R600/SI: remove SI_vs_load_buffer_indexChristian Konig
2013-03-07R600/SI: remove SGPR address space v2Christian Konig
2013-03-07R600/SI: add proper formal parameter handling for SIChristian Konig
2013-03-07R600/SI: remove shader type intrinsicChristian Konig
2013-03-07R600/SI: switch types of SGPRs to v*i8Christian Konig
2013-03-07R600/SI: fix unused variable warningChristian Konig
2013-03-05R600: Do not predicate vector opVincent Lejeune
2013-03-05Update cmake build.Benjamin Kramer
2013-03-05R600: initial scheduler codeVincent Lejeune
2013-03-05R600: Remove LowerConstCopyPass and lower CONST_COPY right after ISel.Vincent Lejeune
2013-03-05R600: Turn BUILD_VECTOR into Reg_SequenceVincent Lejeune
2013-03-05R600: CONST_ADDRESS node is not marked as mayLoad anymoreVincent Lejeune
2013-03-05R600: Use MUL_IEEE for trig/fdiv intrinsicVincent Lejeune
2013-03-05R600: Add support for indirect addressing of non default const bufferVincent Lejeune
2013-03-04R600: Clean up datalayout strings so they better match hardware capabilitiesTom Stellard
2013-03-01R600/SI: handle all registers in copyPhysReg v2Christian Konig
2013-03-01R600/SI: remove S_MOV immediate patternsChristian Konig
2013-03-01R600/SI: remove GPR*AlignEncodeChristian Konig
2013-03-01R600/SI: fix warning about overloaded virtualChristian Konig
2013-03-01R600/SI: fix inserting waits for unordered definesChristian Konig
2013-02-26R600/SI: Add promotion of e32 to e64 in operand foldingChristian Konig
2013-02-26R600/SI: add VOP mapping functionsChristian Konig
2013-02-26R600/SI: swap operands if it helps foldingChristian Konig
2013-02-26R600/SI: add some more instruction flagsChristian Konig
2013-02-26R600/SI: add post ISel folding for SI v2Christian Konig
2013-02-26R600/SI: add folding helperChristian Konig
2013-02-26R600/SI: fix VOP3b encoding v2Christian Konig
2013-02-26R600/SI: fix and cleanup SI register definition v2Christian Konig
2013-02-26R600/SI: fix stupid typoChristian Konig
2013-02-22R600/SI: Add pattern for sign extension of i1 to i32.Michel Danzer
2013-02-22R600/SI: Add pattern for logical or of i1 values.Michel Danzer
2013-02-22R600/SI: Add pattern for fceil.Michel Danzer
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