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path: root/lib/Target/PowerPC/PPCRegisterInfo.cpp
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2006-04-03Force use of a frame-pointer if there is anything on the stack that is alignedChris Lattner
more than the OS keeps the stack aligned. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27381 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28Expose base register for DwarfWriter. Refactor code accordingly.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27225 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-27Translate llvm target registers to dwarf register numbers properly.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27180 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-23Add support to locate local variables in frames (early version.)Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26994 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22When possible, custom lower 32-bit SINT_TO_FP to this:Chris Lattner
_foo2: extsw r2, r3 std r2, -8(r1) lfd f0, -8(r1) fcfid f0, f0 frsp f1, f0 blr instead of this: _foo2: lis r2, ha16(LCPI2_0) lis r4, 17200 xoris r3, r3, 32768 stw r3, -4(r1) stw r4, -8(r1) lfs f0, lo16(LCPI2_0)(r2) lfd f1, -8(r1) fsub f0, f1, f0 frsp f1, f0 blr This speeds up Misc/pi from 2.44s->2.09s with LLC and from 3.01->2.18s with llcbeta (16.7% and 38.1% respectively). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26943 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-16remove dead variableChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26813 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-16teach the ppc backend how to spill/reload vector regsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26806 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-16in functions that use a lot of callee saved regs, this can be more thanChris Lattner
5 instructions away. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26801 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-16Add support for copying registers. still needed: spilling and reloading themChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26800 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-13For functions that use vector registers, save VRSAVE, mark usedChris Lattner
registers, and update it on entry to each function, then restore it on exit. This compiles: void func(vfloat *a, vfloat *b, vfloat *c) { *a = *b * *c + *c; } to this: _func: mfspr r2, 256 oris r6, r2, 49152 mtspr 256, r6 lvx v0, 0, r5 lvx v1, 0, r4 vmaddfp v0, v1, v0, v0 stvx v0, 0, r3 mtspr 256, r2 blr GCC produces this (which has additional stack accesses): _func: mfspr r0,256 stw r0,-4(r1) oris r0,r0,0xc000 mtspr 256,r0 lvx v0,0,r5 lvx v1,0,r4 lwz r12,-4(r1) vmaddfp v0,v0,v1,v0 stvx v0,0,r3 mtspr 256,r12 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26733 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far ↵Chris Lattner
more logical place. Other methods should also be moved if anyoneis interested. :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25913 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11Fix an off-by-one error that Nate's eagle eyes caughtChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25231 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11Use the auto-insert BuildMI constructor to avoid an explicit insert. NoChris Lattner
functionality change, just code cleanup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25230 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11If a function has a non-zero sized frame, use an add to adjust the stackChris Lattner
pointer in the epilog, not a load. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25229 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-09New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replaceEvan Cheng
hasInFlag, hasOutFlag. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25155 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-23* Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.Evan Cheng
* Added a pseudo instruction (for each target) that represent "return void". This is a workaround for lack of optional flag operand (return void is not lowered so it does not have a flag operand.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24997 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-06Add the necessary support to the ISel to allow targets to codegen the newNate Begeman
alignment information appropriately. Includes code for PowerPC to support fixed-size allocas with alignment larger than the stack. Support for arbitrarily aligned dynamic allocas coming soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24224 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18Fix the JIT encoding of LWA, LD, STD, and STDU.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23787 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18First bits of 64 bit PowerPC stuff, currently disabled. A lot of this isNate Begeman
purely mechanical. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23778 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-16More PPC32 -> PPC changes, as well as merging some classes that wereNate Begeman
redundant after the change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23759 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14Rename PPC32*.h to PPC*.hChris Lattner
This completes the grand PPC file renaming git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23745 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14Rename PowerPC*.h to PPC*.hChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23743 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14Rename PowerPCInstrBuilder.h -> PPC*Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23742 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.tdChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23738 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01like the comment says, enable thisChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23581 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01Modify the ppc backend to use two register classes for FP: F8RC and F4RC.Chris Lattner
These are used to represent float and double values, and the two regclasses contain the same physical registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23577 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30Remove some now-dead code.Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23571 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30constant fold these callsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23558 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30pass extra argsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23539 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-17Implement hook for ppcChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23374 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-09I forgot that we always spill fp values as 64-bits. Implement spill foldingChris Lattner
for FP as well. This triggers a couple dozen times on 177.mesa (for example). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23299 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-09Fix a problem that Nate noticed, where spill code was not getting coallescedChris Lattner
with copies, leading to code like this: lwz r4, 380(r1) or r10, r4, r4 ;; Last use of r4 By teaching the PPC backend how to fold spills into copies, we now get this code: lwz r10, 380(r1) wow. :) This reduces a testcase nate sent me from 1505 instructions to 1484. Note that this could handle FP values but doesn't currently, for reasons mentioned in the patch git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23298 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-09code cleanupChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23297 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26teach getClass what a condition reg isChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23105 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26Minor cleanups:Chris Lattner
* avoid calling getClass() multiple times (it is relatively expensive) * Allow -disable-fp-elim to turn of frame pointer elimination. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23104 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Now that the simple isels are dead, so is this.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22913 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18MFLR doesn't take an operand, the LR register is implicitChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22882 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-04Use the new subtarget support to automatically choose the correct ABINate Begeman
and asm printer for PowerPC if one is not specified. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22659 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-30Keep tabs and trailing spaces out.Jeff Cohen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22565 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-27Fix some commentsNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22530 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-27Implement the optimization for the Red Zone on Darwin. This removes theNate Begeman
unnecessary SP manipulation in leaf routines that don't need it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22522 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-22Convert tabs to spacesMisha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21452 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-21Remove trailing whitespaceMisha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21425 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12Initial support for allocation condition registersNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21246 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10Remove unnecessary Implicit Defs. Since r0 is not in allocation, we do notNate Begeman
have to inform the register allocator it might be stepped on. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21202 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04Remove unnecessary register copy now that regalloc is fixedNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21085 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-26Eliminate usage of MRegisterInfo::getRegClass(physreg)Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17240 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-27Correct some BuildMI arguments for the upcoming simple schedulerNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16519 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-01Changes For Bug 352Reid Spencer
Move include/Config and include/Support into include/llvm/Config, include/llvm/ADT and include/llvm/Support. From here on out, all LLVM public header files must be under include/llvm/. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16137 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-27Register sizes are in bits, not bytesNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16070 91177308-0d34-0410-b5e6-96231b3b80d8
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