| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2004-10-07 | Add ori reg, reg, 0 as a move instruction. This can be generated from | Nate Begeman | |
| loading a 32bit constant into a register whose low halfword is all zeroes. We now omit the ori after the lis for the following C code: int bar(int y) { return y * 0x00F0000; } _bar: .LBB_bar_0: ; entry ; IMPLICIT_DEF lis r2, 15 mullw r3, r3, r2 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16825 91177308-0d34-0410-b5e6-96231b3b80d8 | |||
| 2004-08-17 | PowerPC 32-/64-bit split: Part I, PPC32* bit files, adapted from former PowerPC* | Misha Brukman | |
| git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15850 91177308-0d34-0410-b5e6-96231b3b80d8 | |||
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