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platform-independent code, since a bunch of platforms (ARM, Mips, PPC, Alpha are the relevant targets here) need to do essentially the same thing.
I think this completes the basic CodeGen for atomicrmw and cmpxchg.
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MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser.
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is to use this for architectures that have a native FMA instruction.
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Noticed by Benjamin Kramer!
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doesn't appear to be dead.
Roman, since you're writing tests for other PPC-SVR4 vararg-related stuff, would you mind writing a test for this?
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No functional change.
Part of PR6965
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- Check for MTCTR8 in addition to MTCTR when looking up a hazard.
- When lowering an indirect call use CTR8 when targeting 64bit.
- Introduce BCTR8 that uses CTR8 and use it on 64bit when expanding ISD::BRIND.
The last change fixes PR8487. With those changes, we are able to compile a
running "ls" and "sh" on FreeBSD/PowerPC64.
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Part of rdar://9119939
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functionality change.
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triple component.
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Luis Felipe Strano Moraes!
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This causes defs to dominate uses, no instructions after terminators, and other
goodness.
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The 32-bit R0 cannot be used where a 64-bit register is expected.
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the type of the LHS.
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LiveIns."
In other words, do not keep track of argument's location. The debugger (gdb) is not prepared to see line table entries for arguments. For the debugger, "second" line table entry marks beginning of function body.
This requires some coordination with debugger to get this working.
- The debugger needs to be aware of prolog_end attribute attached with line table entries.
- The compiler needs to accurately mark prolog_end in line table entries (at -O0 and at -O1+)
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other getNode() methods. Radar 9002173.
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and fixes here and there.
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new gcc warning that complains on self-assignments and
self-initializations.
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something that just glues two nodes together, even if it is
sometimes used for flags.
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different ways. Add $non_lazy_ptr support, and proper lowering for
global values.
Now all the ppc regression tests pass with the new instruction printer.
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nodes to indicate when ha16/lo16 modifiers should be used. This lets
us pass PowerPC/indirectbr.ll.
The one annoying thing about this patch is that the MCSymbolExpr isn't
expressive enough to represent ha16(label1-label2) which we need on
PowerPC. I have a terrible hack in the meantime, but this will have
to be revisited at some point.
Last major conversion item left is global variable references.
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and have isel apply to to call operands as required. This allows
us to get $stub suffixes on label references on ppc/tiger with the
new instprinter, fixing two tests. Only 2 to go.
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and as such can be represented by an MVT - the more complicated
EVT is not needed. Use MVT for ValVT everywhere.
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value type, so there is no point in passing it around using
an EVT. Use the simpler MVT everywhere. Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.
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basic logic, added initial platform support.
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(gcc-4.6 warns about these).
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virtual registers for those stores since RegAllocFast requires that each live
physreg only be used once.
This fixes PR8357.
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alignment for PPC32/64, avoiding some masking operations.
llvm-gcc expands vaarg inline instead of using the instruction
so it has never hit this.
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MachinePointerInfo around more.
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SelectionDAG::getExtLoad overload, and eliminate it.
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instead of srcvalue/offset pairs. This corrects SV info for mem
operations whose size is > 32-bits.
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See PR5201. There is no way to know if direct calls will be within the allowed
range for BL. Hence emit all calls as indirect when in JIT mode.
Without this long-running applications will fail to JIT on PowerPC with a
relocation failure.
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for consistency sake.
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code can do calling-convention queries. This obviates OutputArgReg.
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the block before calling the expansion hook. And don't
put EFLAGS in a mbb's live-in list twice.
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