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path: root/lib/Target/PowerPC/PPCHazardRecognizers.cpp
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2008-01-07rename TargetInstrDescriptor -> TargetInstrDesc.Chris Lattner
Make MachineInstr::getDesc return a reference instead of a pointer, since it can never be null. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45695 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07use predicate.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45691 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-06rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45667 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-06rename isStore -> mayStore to more accurately reflect what it captures.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45656 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29Remove attribution from file headers, per discussion on llvmdev.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-05LVXL and STVXL are also a load and store resp.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41733 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-13Skeleton of post-RA scheduler; doesn't do anything yet.Dale Johannesen
Change name of -sched option and DEBUG_TYPE to pre-RA-sched; adjust testcases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39816 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-27Fix parenthesis for BCTRL_{ELF|Macho} test.Nicolas Geoffray
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34668 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-25implement support for the linux/ppc function call ABI. Patch byChris Lattner
Nicolas Geoffray! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34574 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-07What should be the last unnecessary <iostream>s in the library.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32333 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-16add ppc64 r+i stores with update.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31776 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-15Switch loads over to use memri as the operand instead of a reg/imm operandChris Lattner
pair for cleanliness. Add instructions for PPC32 preinc-stores with commented out patterns. More improvement is needed to enable the patterns, but we're getting close. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31749 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-13teach the g5 hazard recognizer about update loads. This fixesChris Lattner
Ptrdist/anagram among others. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31708 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-14Add missing PPC64 extload/truncstoresChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29140 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10Implement Regression/CodeGen/PowerPC/bswap-load-store.ll by folding bswapsChris Lattner
into i16/i32 load/stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29089 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22When possible, custom lower 32-bit SINT_TO_FP to this:Chris Lattner
_foo2: extsw r2, r3 std r2, -8(r1) lfd f0, -8(r1) fcfid f0, f0 frsp f1, f0 blr instead of this: _foo2: lis r2, ha16(LCPI2_0) lis r4, 17200 xoris r3, r3, 32768 stw r3, -4(r1) stw r4, -8(r1) lfs f0, lo16(LCPI2_0)(r2) lfd f1, -8(r1) fsub f0, f1, f0 frsp f1, f0 blr This speeds up Misc/pi from 2.44s->2.09s with LLC and from 3.01->2.18s with llcbeta (16.7% and 38.1% respectively). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26943 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-13Fix a couple of bugs that broke the alpha tester buildChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26722 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-13Handle cracked instructions in dispatch group formation.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26721 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-12Several big changes:Chris Lattner
1. Use flags on the instructions in the .td file to indicate the PPC970 unit type instead of a table in the .cpp file. Much cleaner. 2. Change the hazard recognizer to build d-groups according to the actual algorithm used, not my flawed understanding of it. 3. Model "must be in the first slot" and "must be the only instr in a group" accurately. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26719 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-11blr is a branch tooChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26710 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-08Change the interface for getting a target HazardRecognizer to be more clean.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26608 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-07add another missing store.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26595 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-07add a couple more load/store instrs, add a newline to the end of file.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26594 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-07This kinda sorta implements "things that have to lead a dispatch group".Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26591 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-07add some new instructions to the classifier. With this, we correctly insertChris Lattner
a nop into Freebench/neural, which speeds it up from 136->129s (~5.4%). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26590 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-07add some comments that describe what we modelChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26588 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-07Implement a very very simple hazard recognizer for LSU rejects and ctr set/readChris Lattner
flushes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26587 91177308-0d34-0410-b5e6-96231b3b80d8
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