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path: root/lib/Target/PowerPC/PPC32ISelSimple.cpp
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2004-10-22Adjust to changes in Makefile.rulesReid Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17167 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-20Don't clear or sign extend bool->int. This fires a few dozen times on the ↵Nate Begeman
test suite git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17147 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-17Implement bitfield insert by recognizing the following pattern:Nate Begeman
1. optional shift left 2. and x, immX 3. and y, immY 4. or z, x, y ==> rlwimi z, x, y, shift, mask begin, mask end where immX == ~immY and immX is a run of set bits. This transformation fires 32 times on voronoi, once on espresso, and probably several dozen times on external benchmarks such as gcc. To put this in terms of actual code generated for struct B { unsigned a : 3; unsigned b : 2; }; void storeA (struct B *b, int v) { b->a = v;} void storeB (struct B *b, int v) { b->b = v;} Old: _storeA: rlwinm r2, r4, 0, 29, 31 lwz r4, 0(r3) rlwinm r4, r4, 0, 0, 28 or r2, r4, r2 stw r2, 0(r3) blr _storeB: rlwinm r2, r4, 3, 0, 28 rlwinm r2, r2, 0, 27, 28 lwz r4, 0(r3) rlwinm r4, r4, 0, 29, 26 or r2, r2, r4 stw r2, 0(r3) blr New: _storeA: lwz r2, 0(r3) rlwimi r2, r4, 0, 29, 31 stw r2, 0(r3) blr _storeB: lwz r2, 0(r3) rlwimi r2, r4, 3, 27, 28 stw r2, 0(r3) blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17078 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-16Finally fix one of the oldest FIXMEs in the PowerPC backend: correctlyNate Begeman
flag rotate left word immediate then mask insert (rlwimi) as a two-address instruction, and update the ISel usage of the instruction accordingly. This will allow us to properly schedule rlwimi, and use it to efficiently codegen bitfield operations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17068 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-16ADd support for undef and unreachableChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17050 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-15Better codegen of binary integer ops with 32 bit immediate operands.Nate Begeman
This transformation fires a few dozen times across the testsuite. For example, int test2(int X) { return X ^ 0x0FF00FF0; } Old: _test2: lis r2, 4080 ori r2, r2, 4080 xor r3, r3, r2 blr New: _test2: xoris r3, r3, 4080 xori r3, r3, 4080 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17004 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-08Implement logical and with an immediate that consists of a contiguous blockNate Begeman
of one or more 1 bits (may wrap from least significant bit to most significant bit) as the rlwinm rather than andi., andis., or some longer instructons sequence. int andn4(int z) { return z & -4; } int clearhi(int z) { return z & 0x0000FFFF; } int clearlo(int z) { return z & 0xFFFF0000; } int clearmid(int z) { return z & 0x00FFFF00; } int clearwrap(int z) { return z & 0xFF0000FF; } _andn4: rlwinm r3, r3, 0, 0, 29 blr _clearhi: rlwinm r3, r3, 0, 16, 31 blr _clearlo: rlwinm r3, r3, 0, 0, 15 blr _clearmid: rlwinm r3, r3, 0, 8, 23 blr _clearwrap: rlwinm r3, r3, 0, 24, 7 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16832 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-07Several fixes and enhancements to the PPC32 backend.Nate Begeman
1. Fix an illegal argument to getClassB when deciding whether or not to sign extend a byte load. 2. Initial addition of isLoad and isStore flags to the instruction .td file for eventual use in a scheduler. 3. Rewrite of how constants are handled in emitSimpleBinaryOperation so that we can emit the PowerPC shifted immediate instructions far more often. This allows us to emit the following code: int foo(int x) { return x | 0x00F0000; } _foo: .LBB_foo_0: ; entry ; IMPLICIT_DEF oris r3, r3, 15 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16826 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-06Correct some typeosChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16770 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-06Turning on fsel code gen now that we can do so would be good.Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16765 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-06Implement floating point select for lt, gt, le, ge using the powerpc fselNate Begeman
instruction. Now, rather than emitting the following loop out of bisect: .LBB_main_19: ; no_exit.0.i rlwinm r3, r2, 3, 0, 28 lfdx f1, r3, r27 addis r3, r30, ha16(.CPI_main_1-"L00000$pb") lfd f2, lo16(.CPI_main_1-"L00000$pb")(r3) fsub f2, f2, f1 addis r3, r30, ha16(.CPI_main_1-"L00000$pb") lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3) fcmpu cr0, f1, f4 bge .LBB_main_64 ; no_exit.0.i .LBB_main_63: ; no_exit.0.i b .LBB_main_65 ; no_exit.0.i .LBB_main_64: ; no_exit.0.i fmr f2, f1 .LBB_main_65: ; no_exit.0.i addi r3, r2, 1 rlwinm r3, r3, 3, 0, 28 lfdx f1, r3, r27 addis r3, r30, ha16(.CPI_main_1-"L00000$pb") lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3) fsub f4, f4, f1 addis r3, r30, ha16(.CPI_main_1-"L00000$pb") lfd f5, lo16(.CPI_main_1-"L00000$pb")(r3) fcmpu cr0, f1, f5 bge .LBB_main_67 ; no_exit.0.i .LBB_main_66: ; no_exit.0.i b .LBB_main_68 ; no_exit.0.i .LBB_main_67: ; no_exit.0.i fmr f4, f1 .LBB_main_68: ; no_exit.0.i fadd f1, f2, f4 addis r3, r30, ha16(.CPI_main_2-"L00000$pb") lfd f2, lo16(.CPI_main_2-"L00000$pb")(r3) fmul f1, f1, f2 rlwinm r3, r2, 3, 0, 28 lfdx f2, r3, r28 fadd f4, f2, f1 fcmpu cr0, f4, f0 bgt .LBB_main_70 ; no_exit.0.i .LBB_main_69: ; no_exit.0.i b .LBB_main_71 ; no_exit.0.i .LBB_main_70: ; no_exit.0.i fmr f0, f4 .LBB_main_71: ; no_exit.0.i fsub f1, f2, f1 addi r2, r2, -1 fcmpu cr0, f1, f3 blt .LBB_main_73 ; no_exit.0.i .LBB_main_72: ; no_exit.0.i b .LBB_main_74 ; no_exit.0.i .LBB_main_73: ; no_exit.0.i fmr f3, f1 .LBB_main_74: ; no_exit.0.i cmpwi cr0, r2, -1 fmr f16, f0 fmr f17, f3 bgt .LBB_main_19 ; no_exit.0.i We emit this instead: .LBB_main_19: ; no_exit.0.i rlwinm r3, r2, 3, 0, 28 lfdx f1, r3, r27 addis r3, r30, ha16(.CPI_main_1-"L00000$pb") lfd f2, lo16(.CPI_main_1-"L00000$pb")(r3) fsub f2, f2, f1 fsel f1, f1, f1, f2 addi r3, r2, 1 rlwinm r3, r3, 3, 0, 28 lfdx f2, r3, r27 addis r3, r30, ha16(.CPI_main_1-"L00000$pb") lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3) fsub f4, f4, f2 fsel f2, f2, f2, f4 fadd f1, f1, f2 addis r3, r30, ha16(.CPI_main_2-"L00000$pb") lfd f2, lo16(.CPI_main_2-"L00000$pb")(r3) fmul f1, f1, f2 rlwinm r3, r2, 3, 0, 28 lfdx f2, r3, r28 fadd f4, f2, f1 fsub f5, f0, f4 fsel f0, f5, f0, f4 fsub f1, f2, f1 addi r2, r2, -1 fsub f2, f1, f3 fsel f3, f2, f3, f1 cmpwi cr0, r2, -1 fmr f16, f0 fmr f17, f3 bgt .LBB_main_19 ; no_exit.0.i git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16764 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-29Generate better code by being far less clever when it comes to the select ↵Nate Begeman
instruction. Don't create overlapping register lifetimes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16580 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-29improve Type::BoolTy codegen by eliminating unnecessary clears and sign extendsNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16578 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-29To go along with sabre's improved InstCombining, improve recognition ofNate Begeman
integers that we can use as immediate values in instructions. Example from yacr2: - lis r10, -1 - ori r10, r10, 65535 - add r28, r28, r10 + addi r28, r28, -1 addi r7, r7, 1 addi r9, r9, 1 b .LBB_main_9 ; loopentry.1.i214 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16566 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-27Correct some BuildMI arguments for the upcoming simple schedulerNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16519 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-23Fix the last of the major PPC GEP folding deficiencies. This will allowNate Begeman
the ISel to use indexed and non-zero immediate offsets for GEPs that have more than one use. This is common for instruction sequences such as a load followed by a modify and store to the same address. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16493 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-22add optimized code sequences for setcc x, 0Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16478 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-21s/ISel/PPC32ISel/ to have unique class names for debugging via gdb because theMisha Brukman
C++ front-end in gcc does not mangle classes in anonymous namespaces correctly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16470 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-04All PPC instructions are now auto-printedNate Begeman
32 and 64 bit AsmWriters unified Darwin and AIX specific features of AsmWriter split out git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16163 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-02Convert remaining X-Form and Pseudo instructions over to asm writerNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16142 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-01Changes For Bug 352Reid Spencer
Move include/Config and include/Support into include/llvm/Config, include/llvm/ADT and include/llvm/Support. From here on out, all LLVM public header files must be under include/llvm/. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16137 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-29Implement the following missing functionality in the PPC backend:Nate Begeman
cast fp->bool cast ulong->fp algebraic right shift long by non-constant value These changes tested across most of the test suite. Fixes Regression/casts git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16081 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-22Kill a majority of unnecessary sign extensions for byte loadsNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15991 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21Back out branchless SetCC code. While it helped a lot in some cases, itNate Begeman
hurt a lot in others. Instead, improve branching version of SetCC and Select instructions. The old code will be in CVS should we ever need to dig it up again. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15979 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-20Implement code to convert SetCC into straight line code where appropriate. ↵Nate Begeman
Add necessary instructions for this transformation to the .td file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15952 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19This PHI has 4 additional operands, not 2.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15926 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19Convert casts that will have no effect into move instructions.Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15914 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19Clean up floating point instruction selection.Nate Begeman
Change int->float cast code to put conversion constants in constant pool. Shorten code sequence for constant pool fp loads. Remove LOADLoDirect/LOADLoIndirect psuedo instructions and tweak asmwriter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15913 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17Re-fix hiding the Frame Pointer from the register allocator in functionsNate Begeman
that have a frame pointer. This change fixes Burg. In addition, make the necessary changes to floating point code gen and constant loading after Chris Lattner's fixes to the asm writer. These changes fix MallocBench/gs git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15873 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17PowerPC 32-/64-bit split: Part I, PPC32* bit files, adapted from former PowerPC*Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15850 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-16Fix mismatched adjust down/up of SP in functions that contain variableNate Begeman
sized allocas. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15806 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15Fix float to int codepath by always allocating 8 bytes for the target of a ↵Nate Begeman
double store; optimize cmplwi generation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15759 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-14Fix handling of FP constants with single precision, and loading of internal ↵Nate Begeman
linkage function addresses git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15742 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-13Fix siod by switching BoolTy to byte rather than int until CFE changes forNate Begeman
Darwin. Also, change asm printer to output proper stubs for external functions whose address is passed as an argument to aid in bugpointing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15721 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-13Fix 177.mesa compilation, don't use floating point regs for base addresses!Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15720 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-13Fix llc crasher compiling siod by giving BuildMI the correct number of argumentsNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15719 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm ↵Nate Begeman
printer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15662 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11Fix a case where constantexprs could leak into the PPC isel.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15661 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11Fix 255.vortex by using getClassB instead of getClassNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15648 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11Breaking up the PowerPC target into 32- and 64-bit subparts, Part I: 32-bit.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15634 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10Renamed PPC32 (namespace for regs, opcodes) to PPC to include 64-bit targetsMisha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15631 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10Fix casts of float to unsigned longNate Begeman
Replace STDX (store 64 bit int indexed) with STFDX (store double indexed) Fix latent bug in indexed load generation Generate indexed loads and stores in many more cases git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15626 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-06Changes commited for Nate Begeman:Chris Lattner
Use a PowerPC specific prolog epilog inserter to control where spilled callee save regs are placed on the stack. Get rid of implicit return address stack slot, save return address reg (LR) in appropriate slot Improve code generated for functions that don't have calls or access globals Note from Chris: PowerPCPEI will eventually be eliminated, once the functionality is merged into CodeGen/PrologEpilogInserter.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15536 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-28Simplify loading (un)signed constants to registers, patch by Nate Begeman.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15306 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-28LI can only take signed values, so values > 32767 can only be loaded with ORIMisha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15299 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-27Build COND_BRANCHes which may become long or short, decided by a later pass.Misha Brukman
Patch by Nate Begeman. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15282 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-27Add IMPLICIT_DEF of LR for branch-and-link instrs (calls and global accesses)Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15270 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-26* Rewrote castsMisha Brukman
* Implemented GEP folding * Dynamically output global address stuff once per function * Fix casting fp<->short/byte Patch contributed by Nate Begeman. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15237 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-23Eliminate spurious empty space; make code easier to page through.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15146 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-23Implement casting a floating point to 32-bit unsigned valueMisha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15143 91177308-0d34-0410-b5e6-96231b3b80d8
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