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2010-04-21Modified some assert() msg strings; no other functionality change.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102008 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-21Implement -disable-non-leaf-fp-elim which disable frame pointer eliminationEvan Cheng
optimization for non-leaf functions. This will be hooked up to gcc's -momit-leaf-frame-pointer option. rdar://7886181 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101984 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-21Thumb instructions which have reglist operands at the end and predicate operandsJohnny Chen
before reglist were not properly handled with respect to IT Block. Fix that by creating a new method ARMBasicMCBuilder::DoPredicateOperands() used by those instructions for disassembly. Add a test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101974 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20Better error-handling of getBitFieldInvMask() where msb < lsb (encoding error),Johnny Chen
instead of just asserting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101942 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20For t2LDRT, t2LDRBT, t2LDRHT, t2LDRSBT, and t2LDRSHT, if ↵Johnny Chen
Rn(Inst{19-16})=='1111', transform the Opcode to the corresponding t2LDR*pci counterpart. Ref: A8.6.86 LDRT, A8.6.65 LDRBT, A8.6.77 LDRHT, A8.6.81 LDRSBT, A8.6.85 LDRSHT git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101915 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20Better error-handling for DisassembleThumb2DPModImm() with 2-reg operands whereJohnny Chen
d==15 is considered illegal. Return false instead of assert(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101852 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20More IT instruction error-handling improvements from fuzzing.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101839 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-19Better error handling of invalid IT mask '0000', instead of just asserting.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101827 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-19According to A8.6.16 B (Encoding T3) and A8.3 Conditional execution -- A8.3.1Johnny Chen
Pseudocode details of conditional, Condition bits '111x' indicate the instruction is always executed. That is, '1111' is a leagl condition field value, which is now mapped to ARMCC::AL. Also add a test case for condition field '1111'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101817 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-19Better error-handling for DisassembleThumb2DPSoReg() where the 3-reg operandJohnny Chen
instructions should have Rd (Inst{11-8}) != 0b1111. Ref: A6.3 32-bit Thumb instruction encoding A6.3.11 Data-processing (shifted register) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101788 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-19ARM disassembler did not react to recent changes to the NEON instruction table.Johnny Chen
VLD1q*_UPD and VST1q*_UPD have the ${dst:dregpair} operand now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101784 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-18Make processor FUs unique for given itinerary. This extends the limit of 32Anton Korobeynikov
FU per CPU arch to 32 per intinerary allowing precise modelling of quite complex pipelines in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101754 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17Fix -Wcast-qual warnings.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101655 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17Add const qualifiers to TargetLoweringObjectFile usage.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101640 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17Use const qualifiers with TargetLowering. This eliminates severalDan Gohman
const_casts, and it reinforces the design of the Target classes being immutable. SelectionDAGISel::IsLegalToFold is now a static member function, because PIC16 uses it in an unconventional way. There is more room for API cleanup here. And PIC16's AsmPrinter no longer uses TargetLowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101635 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17Move per-function state out of TargetLowering subclasses and intoDan Gohman
MachineFunctionInfo subclasses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17Revise my previous change to ExpandBIT_CONVERT. I hadn't realized that thisBob Wilson
may be called when either the source or destination type is i64, and my change also hadn't fixed the most obvious problem -- assuming that i64 will only be bitconverted to f64, ignoring the various vector types. Radar 7873160. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101615 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16Cast to (uint64_t) instead of relying on the "ul" suffix.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101573 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16Add skeleton target-specific SelectionDAGInfo files.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101564 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16Fixed logic error. Should check Builder for validity before calling SetSessionJohnny Chen
on it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101563 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16Fixed a bug in DisassembleN1RegModImmFrm() where a break stmt was missing for aJohnny Chen
case. Also, the 0xFF hex literal involved in the shift for ESize64 should be suffixed "ul" to preserve the shift result. Implemented printHex*ImmOperand() by copying from ARMAsmPrinter.cpp and added a test case for DisassembleN1RegModImmFrm()/printHex64ImmOperand(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101557 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16In the same spirit of r101524, which removed the assert() from ↵Johnny Chen
printAddrMode2OffsetOperand(), this patch removes the assert() from printAddrMode3OffsetOperand() and adds a test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101529 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16Multiclass LdStCop was using pre-UAL syntax LDC<c>L for the L fragment. ChangedJohnny Chen
to the UAL syntax of LDCL<c>, instead. Add a test case for this change which also tests the removal of assert() from printAddrMode2OffsetOperand(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101527 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16Remove the assert() from printAddrMode2OffsetOperand(). "#0 and #-0" areJohnny Chen
considered legal instructions. Refs: A8.6.51 LDC, LDC2 (immediate) -- page A8-107, A8.6.58 LDR (immediate, ARM) -- page A8-121, and A8.6.194 STR (immediate, ARM) -- page A8-395. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101524 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16Use getAL() rather than a major constant.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101446 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15Fixed a bug in ARM disassembly where LDRSBT should have am3offset operand, notJohnny Chen
am2offset. Modified the instruction table entry and added a new test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101415 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15Use default lowering of DYNAMIC_STACKALLOC. As far as I can tell, ARM isle ↵Evan Cheng
is doing the right thing and codegen looks correct for both Thumb and Thumb2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101410 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15ARM SelectDYN_ALLOC should emit a copy from SP rather than referencing SP ↵Evan Cheng
directly. In cases where there are two dyn_alloc in the same BB it would have caused the old SP value to be reused and badness ensues. rdar://7493908 llvm is generating poor code for dynamic alloca, I'll fix that later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101383 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15DEBUG() print out "Unknown format" msg.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101382 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15ReuseFrameIndexVals is used in multiple files, so it can't be static.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101379 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15Fix a bunch of namespace polution.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101376 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15Add more const qualifiers for LLVM IR pointers in CodeGen.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101342 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15Fix build.Anders Carlsson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101335 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15Add const qualifiers to CodeGen's use of LLVM IR constructs.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101334 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15Wrap the error msgs in DEBUG() macro so that they won't appear in NDEBUG build.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101329 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14Fixed another assert exposed by fuzzing. Now, the DisassembleVFPLdStMulFrm()Johnny Chen
function checks whether we have a valid submode for VLDM/VSTM (must be either "ia" or "db") before calling ARM_AM::getAM5Opc(AMSubMode, unsigned char). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101306 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14Add -arm-long-calls option to force calls to be indirect. This makes theJim Grosbach
kernel linker happier when dealing with kexts. Radar 7805069 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101303 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14For t2BFI disassembly, apply the same error checking as in r101205.Johnny Chen
Change the error msg to read "Encoding error: msb < lsb". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14Fixed another assert exposed by fuzzing. The utility function getRegisterEnum()Johnny Chen
was asserting because the (RegClass, RegNum) combination doesn't make sense from an encoding point of view. Since getRegisterEnum() is used all over the place, to change the code to check for encoding error after each call would not only bloat the code, but also make it less readable. An Err flag is added to the ARMBasicMCBuilder where a client can set a non-zero value to indicate some kind of error condition while building up the MCInst. ARMBasicMCBuilder::BuildIt() checks this flag and returns false if a non-zero value is detected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101290 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14Don't custom lower bit converts to ARM VMOVDRRD or VMOVDRR when the operandBob Wilson
does not have a legal type. The legalizer does not know how to handle those nodes. Radar 7854640. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101282 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14Fixed another assert exposed by fuzzing. Now, when an encoding error occursJohnny Chen
involing getBFCInvMask() where lsb <= msb does not hold true, the disassembler just returns false, instead of assert, to indicate disassembly error. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101205 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14Fixed an assert() exposed by fuzzing. Now, instead of assert when an invalidJohnny Chen
instruction encoding is encountered, we just return a NULL ARMBasicMCBuilder instance and the client just returns false to indicate disassembly error. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101201 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13Unbreak CMake build by improving the EnhancedDisassembly makefile aDouglas Gregor
bit (we're not trying to build a shared library yet) and generating the X86GenEDInfo.inc and ARMGenEDInfo.inc files as necessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101188 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13Handle a v2f64 formal parameter that is split between registers and memoryBob Wilson
such that the entire second half is in memory. Radar 7855014. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101181 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13Fixed a nasty layering violation in the edis sourceSean Callanan
code. It used to #include the enhanced disassembly information for the targets it supported straight out of lib/Target/{X86,ARM,...} but now it uses a new interface provided by MCDisassembler, and (so far) implemented by X86 and ARM. Also removed hacky #define-controlled initialization of targets in edis. If clients only want edis to initialize a limited set of targets, they can set --enable-targets on the configure command line. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101179 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13Changed getSOImmValRotate()'s hunt retry logic to ignore the low order 6 bits,Johnny Chen
instead of 7, because we are only looking for even rotate amount. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101172 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13Use MachineBasicBlock::isLiveIn.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101144 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13Replace r101053 with a fix for getSOImmValRotate() so that it will correctlyBob Wilson
recognize all the valid rotated immediates. This fixes the disassembler issue and will also help codegen for some unusual constant values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101114 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-12Fixed a crasher in arm disassembler within ARMInstPrinter.cpp after callingJohnny Chen
ARM_AM::getSoImmVal(V) with a legitimate so_imm value: #245 rotate right by 2. Introduce ARM_AM::getSOImmValOneOrNoRotate(unsigned Arg) which is called from ARMInstPrinter.cpp's printSOImm() function, replacing ARM_AM::getSOImmVal(V). [12:44:43] johnny:/Volumes/data/llvm/git/trunk (local-trunk) $ gdb Debug/bin/llvm-mc GNU gdb 6.3.50-20050815 (Apple version gdb-1346) (Fri Sep 18 20:40:51 UTC 2009) Copyright 2004 Free Software Foundation, Inc. GDB is free software, covered by the GNU General Public License, and you are welcome to change it and/or distribute copies of it under certain conditions. Type "show copying" to see the conditions. There is absolutely no warranty for GDB. Type "show warranty" for details. This GDB was configured as "x86_64-apple-darwin"...Reading symbols for shared libraries ... done (gdb) set args -triple=arm-apple-darwin9 -debug-only=arm-disassembler --disassemble (gdb) r Starting program: /Volumes/data/llvm/git/trunk/Debug/bin/llvm-mc -triple=arm-apple-darwin9 -debug-only=arm-disassembler --disassemble Reading symbols for shared libraries ++. done 0xf5 0x71 0xf0 0x53 Opcode=201 Name=MVNi Format=ARM_FORMAT_DPFRM(4) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- | 0: 1: 0: 1| 0: 0: 1: 1| 1: 1: 1: 1| 0: 0: 0: 0| 0: 1: 1: 1| 0: 0: 0: 1| 1: 1: 1: 1| 0: 1: 0: 1| ------------------------------------------------------------------------------------------------- mvnpls r7, Assertion failed: (V != -1 && "Not a valid so_imm value!"), function printSOImm, file ARMInstPrinter.cpp, line 229. Program received signal SIGABRT, Aborted. 0x00007fff88c65886 in __kill () (gdb) bt #0 0x00007fff88c65886 in __kill () #1 0x00007fff88d05eae in abort () #2 0x00007fff88cf2ef0 in __assert_rtn () #3 0x000000010020e422 in printSOImm (O=@0x1010bdf80, V=-1, VerboseAsm=false, MAI=0x1020106d0) at ARMInstPrinter.cpp:229 #4 0x000000010020e5fe in llvm::ARMInstPrinter::printSOImmOperand (this=0x1020107e0, MI=0x7fff5fbfee70, OpNum=1, O=@0x1010bdf80) at ARMInstPrinter.cpp:254 #5 0x00000001001ffbc0 in llvm::ARMInstPrinter::printInstruction (this=0x1020107e0, MI=0x7fff5fbfee70, O=@0x1010bdf80) at ARMGenAsmWriter.inc:3236 #6 0x000000010020c27c in llvm::ARMInstPrinter::printInst (this=0x1020107e0, MI=0x7fff5fbfee70, O=@0x1010bdf80) at ARMInstPrinter.cpp:182 #7 0x000000010003cbff in PrintInsts (DisAsm=@0x10200f4e0, Printer=@0x1020107e0, Bytes=@0x7fff5fbff060, SM=@0x7fff5fbff078) at Disassembler.cpp:65 #8 0x000000010003c8b4 in llvm::Disassembler::disassemble (T=@0x1010c13c0, Triple=@0x1010b6798, Buffer=@0x102010690) at Disassembler.cpp:153 #9 0x000000010004095c in DisassembleInput (ProgName=0x7fff5fbff3f0 "/Volumes/data/llvm/git/trunk/Debug/bin/llvm-mc") at llvm-mc.cpp:347 #10 0x000000010003eefb in main (argc=4, argv=0x7fff5fbff298) at llvm-mc.cpp:374 (gdb) q The program is running. Exit anyway? (y or n) y [13:36:26] johnny:/Volumes/data/llvm/git/trunk (local-trunk) $ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101053 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-09Provide versions of the ARM eh_sjlj_setjmp instructions for non-VFP subtargetsBob Wilson
such that the non-VFP versions have no implicit defs of VFP registers. If any callee-saved VFP registers are marked as having been defined, the prologue/epilogue code will try to save and restore them. Radar 7770432. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100892 91177308-0d34-0410-b5e6-96231b3b80d8
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