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AgeCommit message (Expand)Author
2012-05-24Make some opcode tables static and const. Allows code to avoid making copies ...Craig Topper
2012-05-24Mark a static array as const.Craig Topper
2012-05-24Mark a static table as const. Shrink opcode size in static tables to uint16_t...Craig Topper
2012-05-23[arm-fast-isel] Add support for non-global callee.Chad Rosier
2012-05-22ARMDisassembler.cpp: Fix utf8 char in comments.NAKAMURA Takumi
2012-05-21ARM: .end_data_region mismatch in Thumb2.Jim Grosbach
2012-05-21Thumb2: RSB source register should be rGRP not GPRnopc.Jim Grosbach
2012-05-20Use the right register class for LDRrs.Jakob Stoklund Olesen
2012-05-20Transfer memory operands to the right instruction.Jakob Stoklund Olesen
2012-05-18Refactor data-in-code annotations.Jim Grosbach
2012-05-17Fix the encoding of the armv7m (MClass) for MSR APSR writes which was missingKevin Enderby
2012-05-17Remove incorrect pattern for ARM SMML instruction.Tim Northover
2012-05-15Allow MCCodeEmitter access to the target MCRegisterInfo.Jim Grosbach
2012-05-14Fix use of uninitialized variable.David Blaikie
2012-05-11[fast-isel] Add support for selecting @llvm.trap().Chad Rosier
2012-05-11[fast-isel] Remove -disable-arm-fast-isel option. -fast-isel=0 suffices. Min...Chad Rosier
2012-05-11[fast-isel] Cleaner fix for when we're unable to handle a non-double multi-regChad Rosier
2012-05-11[fast-isel] Rather then assert (or segfault in a non-asserts build), fall backChad Rosier
2012-05-11The return type is an unsigned, not a bool.Chad Rosier
2012-05-11Add space before an open parenthesis in control flow statements.Manman Ren
2012-05-11Added the missing bit definition for the 4th bit of the STR (post reg) instru...Silviu Baranga
2012-05-11Fixed the LLVM ARM v7 assembler and instruction printer for 8-bit immediate o...Silviu Baranga
2012-05-11ARM: peephole optimization to remove cmp instructionManman Ren
2012-05-10Revert: 156550 "ARM: peephole optimization to remove cmp instruction"Manman Ren
2012-05-10ARM: peephole optimization to remove cmp instructionManman Ren
2012-05-07Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().Jakob Stoklund Olesen
2012-05-05Nuke a few dead remnants of the CBE.Jim Grosbach
2012-05-05Add a new target hook "predictableSelectIsExpensive".Benjamin Kramer
2012-05-04Tweak to the fix in r156212, as with the change in removing the shift theKevin Enderby
2012-05-04Fix a bug in the ARM disassembler for wide branch conditional instructionsKevin Enderby
2012-05-04Added missing CMN case in Thumb2SizeReduction pass so that LLVM emits 16-bits...Sebastian Pop
2012-05-04Pacify GCC's -Wreturn-typeMatt Beaumont-Gay
2012-05-04Make ARM and Mips use TargetMachine::getTLSModel()Hans Wennborg
2012-05-04Remove the SubRegClasses field from RegisterClass descriptions.Jakob Stoklund Olesen
2012-05-03Fix issues with the ARM bl and blx thumb instructions and the J1 and J2 bitsKevin Enderby
2012-05-03Fixed disassembler for vstm/vldm ARM VFP instructions.Silviu Baranga
2012-05-02ARM: Add missing two-operand VBIC aliases.Jim Grosbach
2012-05-02Disallow YIELD and other allocated nop hints in pre-ARMv6 architectures.Richard Barton
2012-05-01ARM: Add a few missing add->sub aliases w/ 'w' suffix.Jim Grosbach
2012-05-01ARM: allow vanilla expressions for movw/movt.Jim Grosbach
2012-05-01Change the PassManager from a reference to a pointer.Bill Wendling
2012-04-30ARM: Diagnostics for out of range fixups.Jim Grosbach
2012-04-30Fix address calculation error from r155744.Jakob Stoklund Olesen
2012-04-30Don't introduce illegal types when creating vmull operations. <rdar://11324364>Bob Wilson
2012-04-28Fix a problem with blocks that need to be split twice.Jakob Stoklund Olesen
2012-04-27ARM: Thumb add(sp plus register) asm constraints.Jim Grosbach
2012-04-27ARM: Tweak tADDrSP definition for consistent operand order.Jim Grosbach
2012-04-27Track worst case alignment padding more accurately.Jakob Stoklund Olesen
2012-04-27Fix the order of the operands in the llvm.fma intrinsic patterns for ARM,Lang Hames
2012-04-27Fix ARM assembly parsing for upper case condition codes on IT instructions.Richard Barton
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