| Age | Commit message (Expand) | Author |
|---|
| 2010-11-12 | Attemt to provide correct encodings for Thumb2 binary operators. | Owen Anderson |
| 2010-11-12 | Eliminate ARM::MOVi2pieces. Just use MOVi32imm and expand it to either movi+o... | Evan Cheng |
| 2010-11-12 | Make this happen for ARM like x86. Don't entirely bail out when | Eric Christopher |
| 2010-11-12 | Add conditional mvn instructions. | Evan Cheng |
| 2010-11-12 | Zap a copy/paste-o bit of dead code. | Jim Grosbach |
| 2010-11-12 | Refactor to parameterize some ARM load/store encoding patterns. Preparatory | Jim Grosbach |
| 2010-11-12 | First stab at providing correct Thumb2 encodings, start with adc. | Owen Anderson |
| 2010-11-12 | Add some missing isel predicates on def : pat patterns to avoid generating VF... | Evan Cheng |
| 2010-11-12 | Kill more unused stuff. | Jim Grosbach |
| 2010-11-12 | Remove unused class. | Jim Grosbach |
| 2010-11-12 | Fill in the default predication bits for ARM unconditional branch. | Jim Grosbach |
| 2010-11-12 | Encoding for ARM LDRSB instructions. | Jim Grosbach |
| 2010-11-12 | Fix up a few more spots of addrmode2 (or not) changes that were | Eric Christopher |
| 2010-11-11 | Start of support for binary emit of 16-it Thumb instructions. | Jim Grosbach |
| 2010-11-11 | Fill out support for Thumb2 encodings of NEON instructions. | Owen Anderson |
| 2010-11-11 | Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. | Owen Anderson |
| 2010-11-11 | Revert the accidental commit I made reverting the previous commit. | Eric Christopher |
| 2010-11-11 | ARM fixup encoding for direct call instructions (BL). | Jim Grosbach |
| 2010-11-11 | Revert this temporarily. | Eric Christopher |
| 2010-11-11 | Change the prologue and epilogue to use push/pop for the low ARM registers. | Eric Christopher |
| 2010-11-11 | Add support for Thumb2 encodings of NEON data processing instructions, using ... | Owen Anderson |
| 2010-11-11 | Encoding of destination fixup for ARM branch and conditional branch | Jim Grosbach |
| 2010-11-11 | Encoding for ARM LDRSH_POST. | Jim Grosbach |
| 2010-11-11 | Encoding for ARM LDRSH and LDRSH_PRE. Cannonicalize operand names. | Jim Grosbach |
| 2010-11-11 | Fix encoding of Ra register for ARM smla* instructions. | Jim Grosbach |
| 2010-11-11 | ARM STRH encoding information. | Jim Grosbach |
| 2010-11-10 | Move LDM predicate operand encoding into base clase. Add STM missing STM | Jim Grosbach |
| 2010-11-10 | ARM LDM encoding for the mode (ia, ib, da, db) operand. | Jim Grosbach |
| 2010-11-10 | Fix ARM encoding of non-return LDM instructions. | Jim Grosbach |
| 2010-11-10 | Fix ARM encoding of LDM+Return instruction. | Jim Grosbach |
| 2010-11-10 | Fix an issue where we tried to turn a v2f32 build_vector into a v4i32 build v... | Nate Begeman |
| 2010-11-10 | Simplify and clean up MC symbol lookup for ARM constant pool values. This fixes | Jim Grosbach |
| 2010-11-10 | Update ARMConstantPoolValue to not use a modifier string. Use an explicit | Jim Grosbach |
| 2010-11-10 | Emit a '!' if this is a "writeback" register or memory address. | Bill Wendling |
| 2010-11-10 | Rename a parameter to avoid confusion with a local variable | Matt Beaumont-Gay |
| 2010-11-09 | Emit the warning about the register list not being in ascending order only once. | Bill Wendling |
| 2010-11-09 | s/std::vector/SmallVector/ | Bill Wendling |
| 2010-11-09 | Delete the allocated vector. | Bill Wendling |
| 2010-11-09 | Define the subtarget feature for the architecture version, | Bob Wilson |
| 2010-11-09 | Do not use MEMBARRIER_MCR for any Thumb code. | Bob Wilson |
| 2010-11-09 | Two types of instructions have register lists: | Bill Wendling |
| 2010-11-09 | Change the ARMConstantPoolValue modifier string to an enumeration. This will | Jim Grosbach |
| 2010-11-09 | Handle ARM constant pool values that need an explicit reference to the '.' | Jim Grosbach |
| 2010-11-09 | Trailing whitespace. | Jim Grosbach |
| 2010-11-09 | Further MCize ARM constant pool values. This allows basic PIC references for | Jim Grosbach |
| 2010-11-09 | Add encoding of Rt to ARM LDR/STR w/ reg+reg offset encoding. | Jim Grosbach |
| 2010-11-09 | For ARM load/store instructions, encode [reg+reg] with no shifter immediate as | Jim Grosbach |
| 2010-11-09 | ARM .word data fixups don't need an adjustment. | Jim Grosbach |
| 2010-11-09 | Add encoder method for ARM load/store shifted register offset operands. | Jim Grosbach |
| 2010-11-09 | Add support for a few simple fixups to the ARM Darwin asm backend. This allows | Jim Grosbach |
