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2009-09-12Merge 81422 from mainline.Tanya Lattner
Proper support of non-lazy indirect symbols. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_26@81648 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-12Merge 80404 from mainline.Tanya Lattner
Let Darwin linker auto-synthesize stubs and lazy-pointers. This deletes a bunch of nasty code in ARM asm printer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_26@81647 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-12Merge 81403 from mainline.Tanya Lattner
Fix double load / store multiple encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_26@81641 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-12Merge 81311 from mainline.Tanya Lattner
Make sure to make stub region writable before emission, executable after emission. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_26@81640 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-12Merge 81310 from mainline.Tanya Lattner
Fix arm jit encoding bug introduced by 75048. Some instructions', e.g. MOVi, bit 25 should be set. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_26@81639 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-22Make x86 test actually test x86 code generation. Fix the Eli Friedman
construct on ARM, which was breaking by coincidence, and add a similar testcase for ARM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79719 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21Rename ARM "lane_cst" operands to "nohash_imm" since they are used forBob Wilson
several things other than Neon vector lane numbers. For inline assembly operands with a "c" print code, check that they really are immediates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79676 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21Match VTRN, VZIP, and VUZP shuffles. Restore the tests for these operations,Bob Wilson
now using shuffles instead of intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79673 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21Fix some typos and use type-based isel for VZIP/VUZP/VTRNAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79625 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21Add lowering of ARM 4-element shuffles to multiple instructios via ↵Anton Korobeynikov
perfectshuffle-generated table. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79624 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21Add nodes & dummy matchers for some v{zip,uzp,trn} instructionsAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79622 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21Expand EXTRACT_SUBVECTORAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79621 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21Provide vext.{16,32}Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79620 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21Use masks not nodes for vector shuffle predicates. Provide set of 'legal' ↵Anton Korobeynikov
masks, so legalizer won't infinite cycle git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79619 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21Remove Neon intrinsics for VZIP, VUZP, and VTRN. We will represent these asBob Wilson
vector shuffles. Temporarily remove the tests for these operations until the new implementation is working. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79579 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-20Fix an obvious copy-n-paste bug.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79535 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-19Update Cortex-A8 instruction itineraries for integer instructions.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79436 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-19Add support for Neon VEXT (vector extract) shuffles.Bob Wilson
This is derived from a patch by Anton Korzh. I modified it to recognize the VEXT shuffles during legalization and lower them to a target-specific DAG node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79428 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-19eliminate AsmPrinter::SwitchToSection and just have clientsChris Lattner
talk to the MCStreamer directly instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79405 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-18Simplify RegScavenger::FindUnusedReg.Jakob Stoklund Olesen
- Drop the Candidates argument and fix all callers. Now that RegScavenger tracks available registers accurately, there is no need to restict the search. - Make sure that no aliases of the found register are in use. This was a potential bug. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79369 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-18Fix revsh pattern.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79318 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-16Fix use after free in Thumb2SizeReduction (PR4707). A MachineInstr was used ↵Benjamin Kramer
after erasure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79189 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-15Reapply r79127. It was fixed by d0k.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79136 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-15Revert r79127. It was causing compilation errors.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79135 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-15Change allowsUnalignedMemoryAccesses to take type argument since some targetsEvan Cheng
support unaligned mem access only for certain types. (Should it be size instead?) ARM v7 supports unaligned access for i16 and i32, some v6 variants support it as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79127 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-15Turn on if-conversion for thumb2.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79084 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-15Do not use frame register to reference fixed stack objects if the function ↵Evan Cheng
is frameless. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79067 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-14Leaf functions which do not save CSRs can be frameless even with ↵Evan Cheng
-disable-fp-elim. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79039 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-14Allow targets to specify their choice of calling conventions perAnton Korobeynikov
libcall. Take advantage of this in the ARM backend to rectify broken choice of CC when hard float is in effect. PIC16 may want to see if it could be of use in MakePIC16Libcall, which works unchanged. Patch by Sandeep! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79033 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-14Add Thumb2 lsr hooks.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79032 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-1480 col violation.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79026 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-14Indentation.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-14Also shrink immediate branches; also more assembler workarounds.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79014 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-14Now that all the legal Neon shuffles (or at least the ones that have beenBob Wilson
implemented so far) are recognized during legalization, it is easy to fall back to the default expansion for other shuffles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78995 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-14Create a new ARM-specific DAG node, VDUP, to represent a splat from aBob Wilson
scalar_to_vector. Generate these VDUP nodes during legalization instead of trying to recognize the pattern during selection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78994 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-14During legalization, change Neon vdup_lane operations from shuffles toBob Wilson
target-specific VDUPLANE nodes. This allows the subreg handling for the quad-register version to be done easily with Pats in the .td file, instead of with custom code in ARMISelDAGToDAG.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78993 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-14Shrink ADR and LDR from constantpool late during constantpool island pass.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78970 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-14New entry.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78968 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-13Push LLVMContexts through the IntegerType APIs.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78948 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-13Revert 78892 and 78895, these break generating working executables onDaniel Dunbar
x86_64-apple-darwin10. --- Reverse-merging r78895 into '.': U test/CodeGen/PowerPC/2008-12-12-EH.ll U lib/Target/DarwinTargetAsmInfo.cpp --- Reverse-merging r78892 into '.': U include/llvm/Target/DarwinTargetAsmInfo.h U lib/Target/X86/X86TargetAsmInfo.cpp U lib/Target/X86/X86TargetAsmInfo.h U lib/Target/ARM/ARMTargetAsmInfo.h U lib/Target/ARM/ARMTargetMachine.cpp U lib/Target/ARM/ARMTargetAsmInfo.cpp U lib/Target/PowerPC/PPCTargetAsmInfo.cpp U lib/Target/PowerPC/PPCTargetAsmInfo.h U lib/Target/PowerPC/PPCTargetMachine.cpp G lib/Target/DarwinTargetAsmInfo.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78919 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-13Add missing defs of R2 and D1.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78918 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-13Finalize itineraries for cortex-a8 integer multiplyDavid Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78908 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-13Remove unnecessary newlineJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78905 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-13Correct comment wordingJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78904 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-13tPOP_RET now has predicate operands.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78898 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-13Add a fixme message about canonicalizing floating-point vector types.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78897 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-13Revert r78852 for now. I want to do this differently, but I don't have timeBob Wilson
to fix it tonight. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78896 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-13It's ok to spill a tGPR register as long as it's still allocated a low register.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78893 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-13fix a minor fixme. When building with SL and later tools, the ".eh" symbolsChris Lattner
don't need to be exported from the .o files. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78892 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-13Change MCSectionELF to represent a section semantically instead ofBruno Cardoso Lopes
syntactically as a string, very similiar to what Chris did with MachO. The parsing support and validation is not introduced yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78890 91177308-0d34-0410-b5e6-96231b3b80d8
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