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path: root/lib/Target/ARM/Thumb2SizeReduction.cpp
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2009-08-23remove various std::ostream version of printing methods fromChris Lattner
MachineInstr and MachineOperand. This required eliminating a bunch of stuff that was using DOUT, I hope that bill doesn't mind me stealing his fun. ;-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79813 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-16Fix use after free in Thumb2SizeReduction (PR4707). A MachineInstr was used ↵Benjamin Kramer
after erasure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79189 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-15Turn on if-conversion for thumb2.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79084 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-14Shrink ADR and LDR from constantpool late during constantpool island pass.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78970 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-12PredCC is meant to be 2 bits wide, like PredCC1.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78829 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-12Shrink Thumb2 movcc instructions.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78790 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-12Shrink ADDS, ADC, RSB, and SUBS.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78776 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11Shrinkify Thumb2 r = add sp, imm.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78745 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11Shrinkify Thumb2 load / store multiple instructions.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78717 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11Fix the previous accidental commit. Now shrinking common Thumb2 load / store ↵Evan Cheng
instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78659 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11Fix Thumb2 load / store addressing mode matching code. Do not use so_reg form toEvan Cheng
match base only address, i.e. [r] since Thumb2 requires a offset register field. For those, use [r + imm12] where the immediate is zero. Note the generated assembly code does not look any different after the patch. But the bug would have broken the JIT (if there is Thumb2 support) and it can break later passes which expect the address mode to be well-formed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78658 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10Watch out for empty BB.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78562 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10rev, rev16, and revsh do not set CPSR.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78561 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10Duh. Most 16-bit Thumb rr instructions are two-address. Fix table.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78560 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10CPSR can be livein; transfer predicate operands correctly; tMUL is two-address.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78559 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10Add support to reduce most of 32-bit Thumb2 arithmetic instructions.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78550 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-09Add support to convert 32-bit instructions to 16-bit non-two-address ones.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78540 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08Add a skeleton Thumb2 instruction size reduction pass.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78456 91177308-0d34-0410-b5e6-96231b3b80d8
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