| Age | Commit message (Expand) | Author |
|---|
| 2009-11-07 | 80-column cleanup of file header comments | Jim Grosbach |
| 2009-11-07 | t2ldrpci_pic can be used for blockaddress as well. | Evan Cheng |
| 2009-11-07 | Refactor code. Fix a potential missing check. Teach isIdentical() about tLDRp... | Evan Cheng |
| 2009-11-07 | - Add TargetInstrInfo::isIdentical(). It's similar to MachineInstr::isIdentical | Evan Cheng |
| 2009-11-06 | - Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relative | Evan Cheng |
| 2009-11-02 | Use NEON reg-reg moves, where profitable. This reduces "domain-cross" stalls,... | Anton Korobeynikov |
| 2009-11-01 | Fix a couple more places where we are creating ld / st instructions without m... | Evan Cheng |
| 2009-10-28 | Add a Thumb BRIND pattern. Change the ARM BRIND assembly to separate the | Bob Wilson |
| 2009-09-15 | Handle AddrMode4 for Thumb2 in rewriteT2FrameIndex. This occurs for | Bob Wilson |
| 2009-08-27 | Fix PR4789. Teach eliminateFrameIndex how to handle VLDRQ and VSTRQ which can... | Evan Cheng |
| 2009-08-11 | Whitespace cleanup. Remove trailing whitespace. | Jim Grosbach |
| 2009-08-10 | Always use the 16-bit tMOVgpr2gpr instead of the 32-bit t2MOVr. | Evan Cheng |
| 2009-08-07 | Use 16-bit tMOVgpr2gpr instead of tMOVr to copy GPR registers in Thumb2 mode. | Evan Cheng |
| 2009-08-07 | It turns out most of the thumb2 instructions are not allowed to touch SP. The... | Evan Cheng |
| 2009-08-03 | Use the i12 variant of load / store opcodes if offset is zero. Now we pass al... | Evan Cheng |
| 2009-08-02 | Move the getInlineAsmLength virtual method from TAI to TII, where | Chris Lattner |
| 2009-07-29 | Optimize Thumb2 jumptable to use tbb / tbh when all the offsets fit in byte /... | Evan Cheng |
| 2009-07-28 | Thumb-2: fix typo that caused incorrect stack elimination for VFP operations ... | David Goodwin |
| 2009-07-28 | - More refactoring. This gets rid of all of the getOpcode calls. | Evan Cheng |
| 2009-07-27 | More DCE. | Evan Cheng |
| 2009-07-27 | Get rid of more dead code. | Evan Cheng |
| 2009-07-27 | Get rid of some more getOpcode calls. | Evan Cheng |
| 2009-07-27 | Use t2LDRi12 and t2STRi12 to load / store to / from stack frames. Eliminate m... | Evan Cheng |
| 2009-07-27 | Use the right instructions to copy between GPR and the more strictive tGPR cl... | Evan Cheng |
| 2009-07-25 | Get rid of a couple of unnecessary getOpcode calls. | Evan Cheng |
| 2009-07-25 | Change Thumb2 jumptable codegen to one that uses two level jumps: | Evan Cheng |
| 2009-07-24 | Clean up. | Evan Cheng |
| 2009-07-24 | FLDD, FLDS, FCPYD, FCPYS, FSTD, FSTS, VMOVD, VMOVQ maps to the same instructi... | Evan Cheng |
| 2009-07-24 | Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index eliminatio... | David Goodwin |
| 2009-07-23 | Fix frame index elimination to correctly handle thumb-2 addressing modes that... | David Goodwin |
| 2009-07-16 | Emit cross regclass register moves for thumb2. | Anton Korobeynikov |
| 2009-07-11 | Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies... | Evan Cheng |
| 2009-07-10 | t2LDM_RET does not fall-through. | David Goodwin |
| 2009-07-08 | Use common code for both ARM and Thumb-2 instruction and register info. | David Goodwin |
| 2009-07-08 | Generalize opcode selection in ARMBaseRegisterInfo. | David Goodwin |
| 2009-07-08 | Checkpoint Thumb2 Instr info work. Generalized base code so that it can be sh... | David Goodwin |
| 2009-07-02 | Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1Ins... | David Goodwin |
