| Age | Commit message (Expand) | Author |
|---|
| 2011-07-20 | Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate A... | Evan Cheng |
| 2011-07-18 | Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for | Evan Cheng |
| 2011-06-30 | Refact ARM Thumb1 tMOVr instruction family. | Jim Grosbach |
| 2011-06-30 | Thumb1 register to register MOV instruction is predicable. | Jim Grosbach |
| 2011-06-29 | Refactor away tSpill and tRestore pseudos in ARM backend. | Jim Grosbach |
| 2011-06-28 | - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and | Evan Cheng |
| 2011-06-02 | Use TRI::has{Sub,Super}ClassEq() where possible. | Jakob Stoklund Olesen |
| 2011-04-26 | Add a TRI::getLargestLegalSuperClass hook to provide an upper limit on regist... | Jakob Stoklund Olesen |
| 2011-04-18 | Trim a few unneeded includes. | Jim Grosbach |
| 2011-03-31 | Provide a legal pointer register class when targeting thumb1. | Jakob Stoklund Olesen |
| 2011-03-05 | In Thumb1 mode the constant might be materialized via the load from constpool... | Anton Korobeynikov |
| 2011-03-05 | Implement frame unwinding information emission for Thumb1. Not finished yet b... | Anton Korobeynikov |
| 2011-03-05 | Preliminary support for ARM frame save directives emission via MI flags. | Anton Korobeynikov |
| 2011-01-13 | When updating a tSpill/tRestore instruction to be a tSTRr/tLDRr, correctly | Jim Grosbach |
| 2011-01-10 | Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs a... | Anton Korobeynikov |
| 2010-12-21 | If we're not using reg+reg offset we're using reg+imm, set the opcode | Eric Christopher |
| 2010-12-16 | Add tSpill and tRestore to the opcodes to replace with tSTRi and tLDRi | Bill Wendling |
| 2010-12-15 | Thumb1 had two patterns for the same load-from-constant-pool instruction. | Jim Grosbach |
| 2010-12-15 | If we're changing the frame register to a physical register other than SP, we | Bill Wendling |
| 2010-12-14 | The tLDR et al instructions were emitting either a reg/reg or reg/imm | Bill Wendling |
| 2010-11-19 | Avoid release build warnings. | Benjamin Kramer |
| 2010-11-18 | Move hasFP() and few related hooks to TargetFrameInfo. | Anton Korobeynikov |
| 2010-11-15 | First step of huge frame-related refactoring: move emit{Prologue,Epilogue} ou... | Anton Korobeynikov |
| 2010-11-02 | Revert r114340 (improvements in Darwin function prologue/epilogue), as it broke | Jim Grosbach |
| 2010-10-19 | Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do any | Jim Grosbach |
| 2010-09-20 | Simplify ARM callee-saved register handling by removing the distinction | Jim Grosbach |
| 2010-09-03 | Re-apply r112883: | Jim Grosbach |
| 2010-09-03 | Revert "For ARM stack frames that utilize variable sized objects and have eit... | Daniel Dunbar |
| 2010-09-02 | For ARM stack frames that utilize variable sized objects and have either | Jim Grosbach |
| 2010-08-26 | Simplify eliminateFrameIndex() interface back down now that PEI doesn't need | Jim Grosbach |
| 2010-08-19 | Add Thumb1 support for virtual frame indices. | Jim Grosbach |
| 2010-08-10 | Re-apply r110655 with fixes. Epilogue must restore sp from fp if the function... | Evan Cheng |
| 2010-08-10 | Revert r110655, "Fix ARM hasFP() semantics. It should return true whenever FP | Daniel Dunbar |
| 2010-08-10 | Fix ARM hasFP() semantics. It should return true whenever FP register is | Evan Cheng |
| 2010-07-20 | Constify some arguments. | Eric Christopher |
| 2010-07-11 | Make getPhysicalRegisterRegClass non-virtual. Should be able to remove it soon. | Rafael Espindola |
| 2010-06-29 | skip dbg_value instructions | Jim Grosbach |
| 2010-05-04 | rdar://7937137 - dbg values not being handled in thumb1 version of | Jim Grosbach |
| 2010-04-15 | ReuseFrameIndexVals is used in multiple files, so it can't be static. | Dan Gohman |
| 2010-04-15 | Add const qualifiers to CodeGen's use of LLVM IR constructs. | Dan Gohman |
| 2010-04-02 | use DebugLoc default ctor instead of DebugLoc::getUnknownLoc() | Chris Lattner |
| 2010-03-13 | Change ARM ld/st multiple instructions to have variant instructions for | Bob Wilson |
| 2010-03-10 | comment why we use custom epilogue for t1 functions using vaargs. | Jim Grosbach |
| 2010-03-10 | Clear up the last (famous last words) frame index value reuse issues for Thumb1. | Jim Grosbach |
| 2010-03-09 | Change the Value argument to eliminateFrameIndex to a type-tagged value. This | Jim Grosbach |
| 2010-03-09 | scavenged frame index value re-use gets confused when more than one base | Jim Grosbach |
| 2010-03-06 | Thumb1 epilogue code generation needs to take into account that callee-saved | Jim Grosbach |
| 2010-02-24 | handle very large call frames when require SPAdj != 0 for Thumb1 | Jim Grosbach |
| 2010-01-19 | Remove predicates when changing an add into an unpredicable mov. | Jakob Stoklund Olesen |
| 2009-12-03 | improve portability to avoid conflicting with std::next in c++'0x. | Chris Lattner |
