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path: root/lib/Target/ARM/Thumb1RegisterInfo.cpp
AgeCommit message (Expand)Author
2010-05-04rdar://7937137 - dbg values not being handled in thumb1 version ofJim Grosbach
2010-04-15ReuseFrameIndexVals is used in multiple files, so it can't be static.Dan Gohman
2010-04-15Add const qualifiers to CodeGen's use of LLVM IR constructs.Dan Gohman
2010-04-02use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()Chris Lattner
2010-03-13Change ARM ld/st multiple instructions to have variant instructions forBob Wilson
2010-03-10comment why we use custom epilogue for t1 functions using vaargs.Jim Grosbach
2010-03-10Clear up the last (famous last words) frame index value reuse issues for Thumb1.Jim Grosbach
2010-03-09Change the Value argument to eliminateFrameIndex to a type-tagged value. ThisJim Grosbach
2010-03-09scavenged frame index value re-use gets confused when more than one baseJim Grosbach
2010-03-06Thumb1 epilogue code generation needs to take into account that callee-savedJim Grosbach
2010-02-24handle very large call frames when require SPAdj != 0 for Thumb1Jim Grosbach
2010-01-19Remove predicates when changing an add into an unpredicable mov.Jakob Stoklund Olesen
2009-12-03improve portability to avoid conflicting with std::next in c++'0x.Chris Lattner
2009-11-09Use Unified Assembly Syntax for the ARM backend.Jim Grosbach
2009-11-0780-column cleanup of file header commentsJim Grosbach
2009-10-28Cleanup now that frame index scavenging via post-pass is working for ARM and ...Jim Grosbach
2009-10-22Trim more includes.Evan Cheng
2009-10-21Missing piece of the ARM frame index post-scavenging conditionalizationJim Grosbach
2009-10-20Now that all ARM subtargets use frame index scavenging, the Thumb1 requires*Jim Grosbach
2009-10-19Enable allocation of R3 in Thumb1Jim Grosbach
2009-10-19Adjust the scavenge register spilling to allow the target to choose anJim Grosbach
2009-10-08Cleanup up unused R3LiveIn tracking.Jim Grosbach
2009-10-08Re-enable register scavenging in Thumb1 by default.Jim Grosbach
2009-10-07reverting thumb1 scavenging default due to test failure while I figure out wh...Jim Grosbach
2009-10-07Enable thumb1 register scavenging by default.Jim Grosbach
2009-10-07Add register-reuse to frame-index register scavenging. When a target usesJim Grosbach
2009-10-05In Thumb1, the register scavenger is not always able to use an emergencyJim Grosbach
2009-10-01ARM::tPOP and tPOP_RET each has an extra writeback operand now.Evan Cheng
2009-09-24Start of revamping the register scavenging in PEI. ARM Thumb1 is the drivingJim Grosbach
2009-09-06Remove some unused variables and methods warned about byDuncan Sands
2009-08-13Push LLVMContexts through the IntegerType APIs.Owen Anderson
2009-08-11Shrinkify Thumb2 load / store multiple instructions.Evan Cheng
2009-08-11Whitespace cleanup. Remove trailing whitespace.Jim Grosbach
2009-08-10Rename MVT to EVT, in preparation for splitting SimpleValueType out into its ...Owen Anderson
2009-07-28tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have.Evan Cheng
2009-07-28- More refactoring. This gets rid of all of the getOpcode calls.Evan Cheng
2009-07-26Rename tMOVhi2lor to tMOVgpr2tgpr. It's not moving from a high register to a ...Evan Cheng
2009-07-26Refactor. Get rid of a few more getOpcode() calls.Evan Cheng
2009-07-24Revert the ConstantInt constructors back to their 2.5 forms where possible, t...Owen Anderson
2009-07-24Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index eliminatio...David Goodwin
2009-07-22Get rid of the Pass+Context magic.Owen Anderson
2009-07-20Fix PR4567. Thumb1 target was using the wrong instruction to handle sp = sub ...Evan Cheng
2009-07-19Fix a regression from 76124. Thumb1 instructions default to S bit being true.Evan Cheng
2009-07-16Emit cross regclass register moves for thumb2.Anton Korobeynikov
2009-07-16Let callers decide the sub-register index on the def operand of rematerialize...Evan Cheng
2009-07-14Move EVER MORE stuff over to LLVMContext.Owen Anderson
2009-07-14llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.Torok Edwin
2009-07-11Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies...Evan Cheng
2009-07-08Implement changes from Chris's feedback.Torok Edwin
2009-07-08Generalize opcode selection in ARMBaseRegisterInfo.David Goodwin
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