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2010-04-21Modified some assert() msg strings; no other functionality change.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102008 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-21Thumb instructions which have reglist operands at the end and predicate operandsJohnny Chen
before reglist were not properly handled with respect to IT Block. Fix that by creating a new method ARMBasicMCBuilder::DoPredicateOperands() used by those instructions for disassembly. Add a test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101974 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20Better error-handling of getBitFieldInvMask() where msb < lsb (encoding error),Johnny Chen
instead of just asserting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101942 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20For t2LDRT, t2LDRBT, t2LDRHT, t2LDRSBT, and t2LDRSHT, if ↵Johnny Chen
Rn(Inst{19-16})=='1111', transform the Opcode to the corresponding t2LDR*pci counterpart. Ref: A8.6.86 LDRT, A8.6.65 LDRBT, A8.6.77 LDRHT, A8.6.81 LDRSBT, A8.6.85 LDRSHT git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101915 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20Better error-handling for DisassembleThumb2DPModImm() with 2-reg operands whereJohnny Chen
d==15 is considered illegal. Return false instead of assert(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101852 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20More IT instruction error-handling improvements from fuzzing.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101839 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-19Better error handling of invalid IT mask '0000', instead of just asserting.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101827 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-19According to A8.6.16 B (Encoding T3) and A8.3 Conditional execution -- A8.3.1Johnny Chen
Pseudocode details of conditional, Condition bits '111x' indicate the instruction is always executed. That is, '1111' is a leagl condition field value, which is now mapped to ARMCC::AL. Also add a test case for condition field '1111'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101817 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-19Better error-handling for DisassembleThumb2DPSoReg() where the 3-reg operandJohnny Chen
instructions should have Rd (Inst{11-8}) != 0b1111. Ref: A6.3 32-bit Thumb instruction encoding A6.3.11 Data-processing (shifted register) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101788 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-19ARM disassembler did not react to recent changes to the NEON instruction table.Johnny Chen
VLD1q*_UPD and VST1q*_UPD have the ${dst:dregpair} operand now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101784 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16Cast to (uint64_t) instead of relying on the "ul" suffix.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101573 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16Fixed logic error. Should check Builder for validity before calling SetSessionJohnny Chen
on it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101563 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16Fixed a bug in DisassembleN1RegModImmFrm() where a break stmt was missing for aJohnny Chen
case. Also, the 0xFF hex literal involved in the shift for ESize64 should be suffixed "ul" to preserve the shift result. Implemented printHex*ImmOperand() by copying from ARMAsmPrinter.cpp and added a test case for DisassembleN1RegModImmFrm()/printHex64ImmOperand(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101557 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15DEBUG() print out "Unknown format" msg.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101382 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15Wrap the error msgs in DEBUG() macro so that they won't appear in NDEBUG build.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101329 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14Fixed another assert exposed by fuzzing. Now, the DisassembleVFPLdStMulFrm()Johnny Chen
function checks whether we have a valid submode for VLDM/VSTM (must be either "ia" or "db") before calling ARM_AM::getAM5Opc(AMSubMode, unsigned char). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101306 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14For t2BFI disassembly, apply the same error checking as in r101205.Johnny Chen
Change the error msg to read "Encoding error: msb < lsb". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14Fixed another assert exposed by fuzzing. The utility function getRegisterEnum()Johnny Chen
was asserting because the (RegClass, RegNum) combination doesn't make sense from an encoding point of view. Since getRegisterEnum() is used all over the place, to change the code to check for encoding error after each call would not only bloat the code, but also make it less readable. An Err flag is added to the ARMBasicMCBuilder where a client can set a non-zero value to indicate some kind of error condition while building up the MCInst. ARMBasicMCBuilder::BuildIt() checks this flag and returns false if a non-zero value is detected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101290 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14Fixed another assert exposed by fuzzing. Now, when an encoding error occursJohnny Chen
involing getBFCInvMask() where lsb <= msb does not hold true, the disassembler just returns false, instead of assert, to indicate disassembly error. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101205 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14Fixed an assert() exposed by fuzzing. Now, instead of assert when an invalidJohnny Chen
instruction encoding is encountered, we just return a NULL ARMBasicMCBuilder instance and the client just returns false to indicate disassembly error. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101201 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13Fixed a nasty layering violation in the edis sourceSean Callanan
code. It used to #include the enhanced disassembly information for the targets it supported straight out of lib/Target/{X86,ARM,...} but now it uses a new interface provided by MCDisassembler, and (so far) implemented by X86 and ARM. Also removed hacky #define-controlled initialization of targets in edis. If clients only want edis to initialize a limited set of targets, they can set --enable-targets on the configure command line. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101179 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07Missed this one line for the previous checkin to fix build warnings.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100697 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07Fixed warnings pointed out by clang.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100696 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07Fixed warnings pointed out by clang.Johnny Chen
Next to work on is ARMDisassemblerCore.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100695 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07Fixed 3 warnings pointed out by clang.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100693 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07Re-enable ARM/Thumb disassembler and add a workaround for a memcpy() call inJohnny Chen
ARMDecoderEmitter.cpp, with FIXME comment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100690 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05Get rid of traling whitespaces. No functionality change.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100404 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05The disassembler impl. of MCDisassembler::getInstruction() was using the patternJohnny Chen
uint32_t insn; MemoryObject.readBytes(Address, 4, (uint8_t*)&insn, NULL) to read 4 bytes of memory contents into a 32-bit uint variable. This leaves the interpretation of byte order up to the host machine and causes PPC test cases of arm-tests, neon-tests, and thumb-tests to fail. Fixed to use a byte array for reading the memory contents and shift the bytes into place for the 32-bit uint variable in the ARM case and 16-bit halfword in the Thumb case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100403 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05Temporarily remove to disable building of ARM disassembler.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100380 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05Re-apply 100265 but instead disable building of ARM disassembly for now.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100379 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05Reverting 100265 to try to get buildbots green again. Lots of self-hosting ↵Evan Cheng
buildbots started complaining since this commit. Also xfail ARM disassembly tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100378 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-03Get rid of the middleman (ARMAlgorithm), which causes more trouble than theJohnny Chen
abstraction it brings. And also get rid of the atexit() handler, it does not belong in the lib directory. :-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100265 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-03Fix comment.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100259 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-03Register ARMAlgorithm::DoCleanup() to be called on exit to free the memoryJohnny Chen
occuplied by the cached ARMAlgorithm objects. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100258 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02Fix another build warning.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100251 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02Second try of initial ARM/Thumb disassembler check-in. It consists of a tablgenJohnny Chen
backend (ARMDecoderEmitter) which emits the decoder functions for ARM and Thumb, and the disassembler core which invokes the decoder function and builds up the MCInst based on the decoded Opcode. Reviewed by Chris Latter and Bob Wilson. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100233 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16--- Reverse-merging r98637 into '.':Bob Wilson
U test/CodeGen/ARM/tls2.ll U test/CodeGen/ARM/arm-negative-stride.ll U test/CodeGen/ARM/2009-10-30.ll U test/CodeGen/ARM/globals.ll U test/CodeGen/ARM/str_pre-2.ll U test/CodeGen/ARM/ldrd.ll U test/CodeGen/ARM/2009-10-27-double-align.ll U test/CodeGen/Thumb2/thumb2-strb.ll U test/CodeGen/Thumb2/ldr-str-imm12.ll U test/CodeGen/Thumb2/thumb2-strh.ll U test/CodeGen/Thumb2/thumb2-ldr.ll U test/CodeGen/Thumb2/thumb2-str_pre.ll U test/CodeGen/Thumb2/thumb2-str.ll U test/CodeGen/Thumb2/thumb2-ldrh.ll U utils/TableGen/TableGen.cpp U utils/TableGen/DisassemblerEmitter.cpp D utils/TableGen/RISCDisassemblerEmitter.h D utils/TableGen/RISCDisassemblerEmitter.cpp U Makefile.rules U lib/Target/ARM/ARMInstrNEON.td U lib/Target/ARM/Makefile U lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp U lib/Target/ARM/AsmPrinter/ARMInstPrinter.h D lib/Target/ARM/Disassembler U lib/Target/ARM/ARMInstrFormats.td U lib/Target/ARM/ARMAddressingModes.h U lib/Target/ARM/Thumb2ITBlockPass.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98640 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16Initial ARM/Thumb disassembler check-in. It consists of a tablgen backendJohnny Chen
(RISCDisassemblerEmitter) which emits the decoder functions for ARM and Thumb, and the disassembler core which invokes the decoder function and builds up the MCInst based on the decoded Opcode. Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm instructions to help disassembly. We also changed the output of the addressing modes to omit the '+' from the assembler syntax #+/-<imm> or +/-<Rm>. See, for example, A8.6.57/58/60. And modified test cases to not expect '+' in +reg or #+num. For example, ; CHECK: ldr.w r9, [r7, #28] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98637 91177308-0d34-0410-b5e6-96231b3b80d8
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