Age | Commit message (Expand) | Author |
2011-04-15 | Thumb2 BFC was insufficiently encoded. | Johnny Chen |
2011-04-14 | Add sanity checkings for Thumb2 Load/Store Register Exclusive family of opera... | Johnny Chen |
2011-04-13 | Thumb disassembler did not handle tBRIND (indirect branch) properly. | Johnny Chen |
2011-04-13 | The LDR*T/STR*T (unpriviledged load/store) operations don't take SP or PC as Rt. | Johnny Chen |
2011-04-13 | Check the corner cases for t2LDRSHi12 correctly and mark invalid encodings as... | Johnny Chen |
2011-04-13 | Fix a bug where for t2MOVCCi disassembly, the TIED_TO register operand was no... | Johnny Chen |
2011-04-12 | Add sanity check for Ld/St Dual forms of Thumb2 instructions. | Johnny Chen |
2011-04-12 | The Thumb2 RFE instructions need to have their second halfword fully specified. | Johnny Chen |
2011-04-12 | Add bad register checks for Thumb2 Ld/St instructions. | Johnny Chen |
2011-04-12 | The Thumb2 Ld, St, and Preload instructions with the i12 forms should have it... | Johnny Chen |
2011-04-12 | Print out a debug message when the reglist fails the sanity check for Thumb L... | Johnny Chen |
2011-04-12 | A8.6.16 B | Johnny Chen |
2011-04-11 | Thumb disassembler was erroneously rejecting "blx sp" instruction. | Johnny Chen |
2011-04-11 | Fix the bug where the immediate shift amount for Thumb logical shift instruct... | Johnny Chen |
2011-04-11 | Adding support for printing operands symbolically to llvm's public 'C' | Kevin Enderby |
2011-04-08 | Sanity check the option operand for DMB/DSB. | Johnny Chen |
2011-03-28 | Fix ARM disassembly for PLD/PLDW/PLI which suffers from code rot and add some... | Johnny Chen |
2011-03-26 | Fixed the t2PLD and friends disassembly and add two test cases. | Johnny Chen |
2011-03-25 | Fix DisassembleThumb2DPReg()'s handling of RegClass. Cannot hardcode GPRRegC... | Johnny Chen |
2011-03-25 | DisassembleThumb2LdSt() did not handle t2LDRs correctly with respect to RegCl... | Johnny Chen |
2011-03-25 | Modify DisassembleThumb2LdStEx() to be more robust/correct in light of recent... | Johnny Chen |
2011-03-25 | Modify the wrong logic in the assert of DisassembleThumb2LdStDual() (the regi... | Johnny Chen |
2011-03-24 | T2 Load/Store Multiple: | Johnny Chen |
2011-03-22 | Avoid -Wunused-variable in -asserts builds | Matt Beaumont-Gay |
2011-03-18 | The disassembler for Thumb was wrongly adding 4 to the computed imm32 offset. | Johnny Chen |
2011-03-17 | It used to be that t_addrmode_s4 was used for both: | Johnny Chen |
2011-02-28 | Add missing whitespace in the formatting. | Kevin Enderby |
2011-02-28 | Fix the arm's disassembler for blx that was building an MCInst without the | Kevin Enderby |
2011-02-18 | Add assembly parsing support for "msr" and also fix its encoding. Also add | Bruno Cardoso Lopes |
2011-02-14 | Fix encoding and add parsing support for the arm/thumb CPS instruction: | Bruno Cardoso Lopes |
2011-02-08 | Revert both r121082 (which broke a bunch of constant pool stuff) and r125074 ... | Owen Anderson |
2010-12-07 | Second attempt at converting Thumb2's LDRpci, including updating the gazillio... | Owen Anderson |
2010-11-30 | Simplify the encoding of reg+/-imm12 values that allow PC-relative encoding. ... | Owen Anderson |
2010-11-29 | Pseudo-ize Thumb2 jump tables with explicit MC lowering to the raw | Jim Grosbach |
2010-11-16 | Encode the multi-load/store instructions with their respective modes ('ia', | Bill Wendling |
2010-11-03 | Add support to match @llvm.prefetch to pld / pldw / pli. rdar://8601536. | Evan Cheng |
2010-10-13 | Detabify and clean up 80 column violations. | Jim Grosbach |
2010-08-17 | Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoid | Bob Wilson |
2010-08-13 | Move the Thumb2 SSAT and USAT optional shift operator out of the | Bob Wilson |
2010-08-13 | Refactor the code for disassembling Thumb2 saturate instructions along the | Bob Wilson |
2010-08-11 | Changed the format of DMBsy, DSBsy, and friends from Pseudo to MiscFrm. | Johnny Chen |
2010-07-30 | Many Thumb2 instructions can reference the full ARM register set (i.e., | Jim Grosbach |
2010-07-16 | Add basic support to code-gen the ARM/Thumb2 bit-field insert (BFI) instruction | Jim Grosbach |
2010-06-18 | Start TargetRegisterClass indices at 0 instead of 1, so that | Dan Gohman |
2010-04-21 | Modified some assert() msg strings; no other functionality change. | Johnny Chen |
2010-04-21 | Thumb instructions which have reglist operands at the end and predicate operands | Johnny Chen |
2010-04-20 | Better error-handling of getBitFieldInvMask() where msb < lsb (encoding error), | Johnny Chen |
2010-04-20 | Better error-handling for DisassembleThumb2DPModImm() with 2-reg operands where | Johnny Chen |
2010-04-19 | Better error-handling for DisassembleThumb2DPSoReg() where the 3-reg operand | Johnny Chen |
2010-04-15 | Wrap the error msgs in DEBUG() macro so that they won't appear in NDEBUG build. | Johnny Chen |