Age | Commit message (Expand) | Author |
2011-04-15 | A8.6.315 VLD3 (single 3-element structure to all lanes) | Johnny Chen |
2011-04-15 | The ARM disassembler did not handle the alignment correctly for VLD*DUP* inst... | Johnny Chen |
2011-04-13 | Check for unallocated instruction encodings when disassembling Thumb Branch i... | Johnny Chen |
2011-04-11 | Trivial comment fix. | Johnny Chen |
2011-04-11 | Check invalid register encodings for LdFrm/StFrm ARM instructions and flag th... | Johnny Chen |
2011-04-11 | Adding support for printing operands symbolically to llvm's public 'C' | Kevin Enderby |
2011-04-08 | Fix an apparent typo that made GCC complain | Matt Beaumont-Gay |
2011-04-08 | Check opcoe (dmb, dsb) instead of bitfields matching. | Johnny Chen |
2011-04-08 | Hanlde the checking of bad regs for SMMLAR properly, instead of asserting. | Johnny Chen |
2011-04-08 | Sanity check the option operand for DMB/DSB. | Johnny Chen |
2011-04-08 | Add sanity checking for bad register specifier(s) for the DPFrm instructions. | Johnny Chen |
2011-04-07 | Add sanity checking for invalid register encodings for signed/unsigned extend... | Johnny Chen |
2011-04-07 | Add sanity checking for invalid register encodings for saturating instructions. | Johnny Chen |
2011-04-07 | Add some more comments about checkings of invalid register numbers. | Johnny Chen |
2011-04-07 | Sanity check MSRi for invalid mask values and reject it as invalid. | Johnny Chen |
2011-04-07 | The ARM disassembler was not recognizing USADA8 instruction. Need to add che... | Johnny Chen |
2011-04-07 | Should also check SMLAD for invalid register values. | Johnny Chen |
2011-04-06 | A8.6.393 | Johnny Chen |
2011-04-06 | A8.6.92 MCR (Encoding A1): if coproc == '101x' then SEE "Advanced SIMD and VFP" | Johnny Chen |
2011-04-06 | Fix a bug in the disassembly of VGETLNs8 where the lane index was wrong. | Johnny Chen |
2011-04-06 | Add a missing opcode (SMLSLDX) to BadRegsMulFrm() function. | Johnny Chen |
2011-04-05 | Fix a typo in the handling of PKHTB opcode, plus add sanity check for illegal... | Johnny Chen |
2011-04-05 | A7.3 register encoding | Johnny Chen |
2011-04-05 | ARM disassembler was erroneously accepting an invalid RSC instruction. | Johnny Chen |
2011-04-05 | ARM disassembler was erroneously accepting an invalid LSL instruction. | Johnny Chen |
2011-04-05 | The r128085 checkin modified the operand ordering for MRC/MRC2 instructions. | Johnny Chen |
2011-04-05 | ARM disassembler should flag (rGPRRegClassID, r13|r15) as an error. | Johnny Chen |
2011-04-05 | Make second source operand of LDRD pre/post explicit. | Jim Grosbach |
2011-04-05 | Check for invalid register encodings for UMAAL and friends where: | Johnny Chen |
2011-04-04 | RFE encoding should also specify the "should be" encoding bits. | Johnny Chen |
2011-04-04 | Fix incorrect alignment for NEON VST2b32_UPD. | Johnny Chen |
2011-04-04 | - Implement asm parsing support for LDRSBT, LDRHT, LDRSHT and STRHT | Bruno Cardoso Lopes |
2011-04-02 | Fixed a bug in disassembly of STR_POST, where the immediate is the second ope... | Johnny Chen |
2011-04-01 | Fix a LDRT/LDRBT decoding bug where for Encoding A2, if Inst{4} != 0, we shou... | Johnny Chen |
2011-04-01 | Fix LDRi12 immediate operand, which was changed to be the second operand in $... | Johnny Chen |
2011-03-31 | Apply again changes to support ARM memory asm parsing. I removed | Bruno Cardoso Lopes |
2011-03-31 | Add BLXi to the instruction table for disassembly purpose. | Johnny Chen |
2011-03-31 | Revert r128632 again, until I figure out what break the tests | Bruno Cardoso Lopes |
2011-03-31 | Reapply r128585 without generating a lib depedency cycle. An updated log: | Bruno Cardoso Lopes |
2011-03-29 | Get rid of the non-writeback versions VLDMDB and VSTMDB, which don't actually... | Owen Anderson |
2011-03-28 | Fix ARM disassembly for PLD/PLDW/PLI which suffers from code rot and add some... | Johnny Chen |
2011-03-25 | Instruction formats of SWP/SWPB were changed from LdStExFrm to MiscFrm. Modi... | Johnny Chen |
2011-03-25 | Also need to handle invalid imod values for CPS2p. | Johnny Chen |
2011-03-24 | Handle the added VBICiv*i* NEON instructions, too. | Johnny Chen |
2011-03-24 | The r118201 added support for VORR (immediate). Update ARMDisassemblerCore.c... | Johnny Chen |
2011-03-24 | Add comments to the handling of opcode CPS3p to reject invalid instruction en... | Johnny Chen |
2011-03-24 | CPS3p: Let's reject impossible imod values by returning false from the Disass... | Johnny Chen |
2011-03-24 | Load/Store Multiple: | Johnny Chen |
2011-03-24 | The r128103 fix to cope with the removal of addressing modes from the MC inst... | Johnny Chen |
2011-03-22 | A8.6.399 VSTM: | Johnny Chen |