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path: root/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
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2010-11-06Add support for parsing register lists. We can't use a bitfield to keep track ofBill Wendling
the registers, because the register numbers may be much greater than the number of bits available in the machine's register. I extracted the register list verification code out of the actual parsing of the registers. This made checking for errors much easier. It also limits the number of warnings that would be emitted for cascading infractions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118363 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06Return the base register of a register list for the "getReg()" method. This isBill Wendling
to satisfy the ClassifyOperand method of the Asm matcher without having to add a RegList type to every back-end. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118360 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06General cleanup:Bill Wendling
- Make ARMOperand a class so that some things are internal to the class. - Reformatting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118357 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06Add a RegList (register list) object to ARMOperand. It will be used soon to holdBill Wendling
(surprise!) a list of registers. Register lists are consecutive, so we only need to record the start register plus the number of registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118351 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06Fix grammar.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118341 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06Fix grammar.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118340 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06MatchRegisterName() returns 0 if it can't match the register.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118339 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06Use TryParseRegister() instead of MatchRegisterName(). The former returns -1Bill Wendling
while the latter doesn't. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118338 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-05Hook up the '.code {16|32}' directive to the streamer.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-05Hook up the '.thumb_func' directive to the streamer.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118307 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-05Fix past-o.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118304 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03The MC code couldn't handle ARM LDR instructions with negative offsets:Bill Wendling
vldr.64 d1, [r0, #-32] The problem was with how the addressing mode 5 encodes the offsets. This change makes sure that the way offsets are handled in addressing mode 5 is consistent throughout the MC code. It involves re-refactoring the "getAddrModeImmOpValue" method into an "Imm12" and "addressing mode 5" version. But not to worry! The majority of the duplicated code has been unified. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118144 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01Add FIXME.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117936 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01Mark ARM subtarget features that are available for the assembler.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117929 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01trailing whitespaceJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117927 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30Tidy up.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117782 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30simplify this code.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117771 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30split MaybeParseRegister into its two logical uses, eliminating malloc+free ↵Chris Lattner
traffic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117769 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Some instructions end with an "ls" prefix, but it doesn't indicate that they areBill Wendling
conditional. Check for those instructions explicitly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117747 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29add FIXMEJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117718 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Handle ARM addrmode5 instructions with an offset.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117672 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Revert 117660. Apparently it's not as trivial as that...Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117663 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29ARM addrmode5 instructions have neither writeback nor post-indexed modes.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117660 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Trailing whitespace.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117651 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29ARMAsmParser: Plug a memory leak.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117648 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Add an unreachable to silence warning - the switch is actuallyEric Christopher
fully enumerated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117647 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29add simple support for addrmode5 operands, allowingChris Lattner
vldr.64 to work. I have no idea if this is fully right, but it is in the right direction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117626 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28give better error diagnostics, for example:Chris Lattner
t.s:1:14: error: invalid operand for instruction vldr.64 d17, [r0] ^ instead of: t.s:1:1: error: unrecognized instruction vldr.64 d17, [r0] ^ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117611 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28move a method out of line.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117605 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28remove the rest of hte owningptr's, no functionality change.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117603 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28rearrange ParseRegisterList.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117560 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28refactor some code to simplify it, eliminating some owningptr's.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117559 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20Remove remaining uses of ATTRIBUTE_UNUSED on variables, and delete threeChandler Carruth
#includes in the process. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116919 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-29implement rdar://8456378 and PR7557 - support for the fstsw,Chris Lattner
an instruction that requires a WHOLE NEW wonderful kind of alias. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115015 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-29change the protocol TargetAsmPArser::MatchInstruction method to take anChris Lattner
MCStreamer to emit into instead of an MCInst to fill in. This allows the matcher extra flexibility and is more convenient. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115014 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-11fix the asmparser so that the target is responsible for skipping toChris Lattner
the end of the line on a parser error, allowing skipping to happen for syntactic errors but not for semantic errors. Before we would miss emitting a diagnostic about the second line, because we skipped it due to the semantic error on the first line: foo %eax bar %al This fixes rdar://8414033 - llvm-mc ignores lines after an invalid instruction mnemonic errors git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113688 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08change the MC "ParseInstruction" interface to make it the Chris Lattner
implementation's job to check for and lex the EndOfStatement marker. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113347 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06in the case where an instruction only has one implementationChris Lattner
of a mneumonic, report operand errors with better location info. For example, we now report: t.s:6:14: error: invalid operand for instruction cwtl $1 ^ but we fail for common cases like: t.s:11:4: error: invalid operand for instruction addl $1, $1 ^ because we don't know if this is supposed to be the reg/imm or imm/reg form. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113178 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06change MatchInstructionImpl to return an enum instead of bool.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113165 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06have AsmMatcherEmitter.cpp produce the hunk of code that gets includedChris Lattner
into the middle of the class, and rework how the different sections of the generated file are conditionally included for simplicity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113163 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01zap dead code.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112712 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12MC/AsmParser: Push the burdon of emitting diagnostics about unmatchedDaniel Dunbar
instructions onto the target specific parser, which can do a better job. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110889 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12tblgen/AsmMatcher: Always emit the match function as 'MatchInstructionImpl',Daniel Dunbar
target specific parsers can adapt the TargetAsmParser to this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110888 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11MC/ARM: Add basic support for handling predication by parsing it out of the ↵Daniel Dunbar
mnemonic into a separate operand form. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110794 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11MC/ARM: Split mnemonic on '.' characters.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110793 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11MC/ARM: Fill in ARMOperand::dump a bit.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110792 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11MCAsmParser: Add dump() hook to MCParsedAsmOperand.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110790 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11MC/ARM: Add an ARMOperand class for condition codes.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110788 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11MC/ARM: Switch to using the generated match functions instead of stub ↵Daniel Dunbar
implementations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110783 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19Target: Give the TargetAsmParser access to the TargetMachine.Daniel Dunbar
- Unfortunate, but necessary for now to handle subtarget instruction matching. Eventually we should factor out the lower level target machine information so we don't need to do this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108664 91177308-0d34-0410-b5e6-96231b3b80d8
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