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path: root/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
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2011-11-15Thumb2 two-operand 'mul' instruction wide encoding parsing.Jim Grosbach
rdar://10449724 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144684 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15Thumb2 assembly parsing for mul.w in IT block fix.Jim Grosbach
When the 3rd operand is not a low-register, and the first two operands are the same low register, the parser was incorrectly trying to use the 16-bit instruction encoding. rdar://10449281 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144679 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-14Tidy up. 80 column.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144538 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-12ARM refactor simple immediate asm operand render methods.Jim Grosbach
These immediate operands all use the same simple logic for rendering to MCInst, so have them share the method for doing so. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144439 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11ARM vldm and vstm VFP instructions can take a data type suffix.Jim Grosbach
It's ignored by the assembler when present, but is legal syntax. Other instructions have something similar, but for some mnemonics it's only sometimes not significant, so this quick check in the parser will need refactored into something more robust soon-ish. This gets some basics working in the meantime. Partial for rdar://10435264 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144422 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11Nuke no longer accurate comment.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144411 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11ARM allow Q registers in vldm/vstm register lists.Jim Grosbach
rdar://9672822 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144407 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10Thumb2 ldm/stm updating w/ one register in the list are LDR/STR.Jim Grosbach
rdar://10429490 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144338 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10ARM let processInstruction() tranforms chain.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144337 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10Thumb2 parsing for push/pop w/ hi registers in the reglist.Jim Grosbach
rdar://10130228. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144331 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10Thumb1 diagnostics for reglist on PUSH/POP fix.Jim Grosbach
Was not checking the first register in the register list. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144329 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10Thumb MUL assembly parsing for 3-operand form.Jim Grosbach
Get the source register that isn't tied to the destination register correct, even when the assembly source operand order is backwards. rdar://10428630 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144322 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10ARM .thumb_func directive for quoted symbol names.Jim Grosbach
Use the getIdentifier() method of the token, not getString(), otherwise we keep the quotes as part of the symbol name, which we don't want. rdar://10428015 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144315 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10ARM assembly parsing for LSR/LSL/ROR(immediate).Jim Grosbach
More of rdar://9704684 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144301 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10ARM assembly parsing for ASR(immediate).Jim Grosbach
Start of rdar://9704684 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144293 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-06Replace (Lower|Upper)caseString in favor of StringRef's newest methods.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143891 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-01ARM label operands can be quoted.Jim Grosbach
For example, labels from Objective-C sources. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143511 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-01ARM label operands can have an optional '#' before them.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143510 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-01ARM VLD/VST assembly parsing for symbolic address operands.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143413 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-31ARM VST1 w/ writeback assembly parsing and encoding.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143369 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-28ARM mode 'mov' to 'mvn' assembler alias.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143237 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-28Add Thumb2 alias for "mov Rd, #imm" to "mvn Rd, #~imm".Jim Grosbach
When '~imm' is encodable as a t2_so_imm but plain 'imm' is not. For example, mov r2, #-3 becomes mvn r2, #2 rdar://10349224 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143235 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-28ARM Allow 'q' registers in VLD/VST vector lists.Jim Grosbach
Just treat it as if the constituent D registers where specified. rdar://10348896 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143167 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-26Thumb2 ldr pc-relative encoding fixes.Jim Grosbach
We were parsing label references to the i12 encoding, which isn't right. They need to go to the pci variant instead. More of rdar://10348687 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143068 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-26ARM parse parenthesized expressions for label references.Jim Grosbach
Partial fix for rdar://10348687. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143063 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-24ARM assembly parsing and encoding for VLD1 w/ writeback.Jim Grosbach
One and two length register list variants. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142861 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-22Move various generated tables into read-only memory, fixing up const ↵Benjamin Kramer
correctness along the way. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142726 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Assembly parsing for 2-register sequential variant of VLD2.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142691 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Assembly parsing for 4-register variant of VLD1.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142682 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Assembly parsing for 3-register variant of VLD1.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142675 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21ARM VLD parsing and encoding.Jim Grosbach
Next step in the ongoing saga of NEON load/store assmebly parsing. Handle VLD1 instructions that take a two-register register list. Adjust the instruction definitions to only have the single encoded register as an operand. The super-register from the pseudo is kept as an implicit def, so passes which come after pseudo-expansion still know that the instruction defines the other subregs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142670 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Don't automatically set the "fc" bits on MSR instructions if the user didn't ↵Owen Anderson
ask for them. This is a divergence from gas' behavior, but it is correct per the documentation and allows us to forge ahead with roundtrip testing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142669 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Nuke an #if0 that got accidentally left in.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142658 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18ARM VTBL (one register) assembly parsing and encoding.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142441 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18ARM assembly parsing and encoding for VMOV.i64.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142356 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i32.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142321 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-17ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i16.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142303 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-17Tidy up.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142297 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-17ARM NEON "vmov.i8" immediate assembly parsing and encoding.Jim Grosbach
NEON immediates are "interesting". Start of the work to handle parsing them in an 'as' compatible manner. Getting the matcher to play nicely with these and the floating point immediates from VFP is an extra fun wrinkle. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142293 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-17Removed set, but unused variables.Chad Rosier
Patch by Joe Abbey <jabbey@arxan.com>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142223 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12Thumb2 assembly parsing and encoding for LDC/STC.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141811 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12ARM parsing and encoding for the <option> form of LDC/STC instructions.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141786 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11ARM assembly parsing and encoding for LDC{2}{L}/STC{2}{L} instructions.Jim Grosbach
Fill out the rest of the encoding information, update to properly mark the LDC/STC instructions as predicable while the LDC2/STC2 instructions are not, and adjust the parser accordingly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141721 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11ARM parse alignment specifier for NEON load/store instructions.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141682 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11ARM Rename operand sub-structure 'Mem' to 'Memory' for a bit more clarity.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141671 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10Simplify operand Kind checks a bit.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141592 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07ARM NEON assembly parsing and encoding for VDUP(scalar).Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141446 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07ARM prefix asmparser operand kind enums for readability.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141438 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07Improve ARM assembly parser diagnostic for unexpected tokens.Jim Grosbach
Consider: mov r8, r11 fred Previously, we issued the not very informative: x.s:6:1: error: unexpected token in argument list ^ Now we generate: x.s:5:14: error: unexpected token in argument list mov r8, r11 fred ^ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141380 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05Support a valid, but not very useful, encoding of CPSIE where none of the ↵Owen Anderson
AIF bits are set. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141190 91177308-0d34-0410-b5e6-96231b3b80d8
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