aboutsummaryrefslogtreecommitdiff
path: root/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
AgeCommit message (Collapse)Author
2012-10-25[ms-inline asm] Add support for creating AsmRewrites in the target specificChad Rosier
AsmParser logic. To be used/tested in a subsequent commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166714 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-13[ms-inline asm] Remove the MatchInstruction() function. Previously, this wasChad Rosier
the interface between the front-end and the MC layer when parsing inline assembly. Unfortunately, this is too deep into the parsing stack. Specifically, we're unable to handle target-independent assembly (i.e., assembly directives, labels, etc.). Note the MatchAndEmitInstruction() isn't the correct abstraction either. I'll be exposing target-independent hooks shortly, so this is really just a cleanup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165858 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-12[ms-inline asm] Use the new API introduced in r165830 in lieu of theChad Rosier
MapAndConstraints vector. Also remove the unused Kind argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165833 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-09In parseMSRMaskOperand, add an explicit check for the operand being an ↵Craig Topper
identifier instead of just having an assert. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165480 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-05[ms-inline asm] Add a few typedefs to simplify future changes.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165324 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-01[ms-inline asm] Add the convertToMapAndConstraints() function that is used toChad Rosier
map constraints and MCInst operands to inline asm operands. This replaces the getMCInstOperandNum() function. The logic to determine the constraints are not in place, so we still default to a register constraint (i.e., "r"). Also, we no longer build the MCInst but rather return just the opcode to get the MCInstrDesc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164979 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. ↵Sylvestre Ledru
See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164768 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27Fix a typo 'iff' => 'if'Sylvestre Ledru
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164767 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-25ARM: 'add Rd, pc, #imm' is an alias for 'adr Rd, #imm'.Jim Grosbach
rdar://9795790 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164577 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-24Rather then have a wrapper function, have tblgen instantiate the implementation.Chad Rosier
Also remove an unused argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164567 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-24Rather then have a wrapper function, have tblgen instantiate the implementation.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164548 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-22Fix the handling of edge cases in ARM shifted operands.Tim Northover
This patch fixes load/store instructions to handle less common cases like "asr #32", "rrx" properly throughout the MC layer. Patch by Chris Lidbury. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164455 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21[ms-inline asm] Expose the mnemonicIsValid() function in the AsmParser.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164420 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21Add comment.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164414 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21Tidy up. Formatting.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164343 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Rename the isMemory() function to isMem(). No functional change intended.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163654 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05Fix function name per coding standard.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163187 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03[ms-inline asm] Asm operands can map to one or more MCOperands. Therefore, addChad Rosier
the NumMCOperands argument to the GetMCInstOperandNum() function that is set to the number of MCOperands this asm operand mapped to. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163124 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03[ms-inline asm] Add an interface to the GetMCInstOperandNum() function in theChad Rosier
MCTargetAsmParser class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163122 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03Removed unused argument.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163104 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03[ms-inline asm] Expose the Kind and Opcode variables from theChad Rosier
MatchInstructionImpl() function. These values are used by the ConvertToMCInst() function to index into the ConversionTable. The values are also needed to call the GetMCInstOperandNum() function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163101 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-31Remove an unused argument. The MCInst opcode is set in the ConvertToMCInst()Chad Rosier
function nowadays. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163030 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-31Add a comment to explain what's really going on.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163005 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-31The ConvertToMCInst() function can't fail, so remove the now dead ↵Chad Rosier
Match_ConversionFail enum. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163002 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-31With the fix in r162954/162955 every cvt function returns true. Thus, haveChad Rosier
the ConvertToMCInst() return void, rather then a bool. Update all the cvt functions as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162961 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-30Fix for r162954. Return the Error.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162955 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-30Move a check to the validateInstruction() function where it more properly ↵Chad Rosier
belongs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162954 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-30Typo.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162952 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-09Remove getARMRegisterNumbering and replace with calls intoEric Christopher
the register info for getEncodingValue. This builds on the small patch of yesterday to set HWEncoding in the register file. One (deprecated) use was turned into a hard number to avoid needing register info in the old JIT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161628 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset ↵Jiangning Liu
index issue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161162 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02Fix #13138, a bug around ARM instruction DSB encoding and decoding issue.Jiangning Liu
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161161 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02Fix #13241, a bug around shift immediate operand for ARM instruction ADR.Jiangning Liu
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161159 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-09Some formatting to keep Clang happyRichard Barton
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159948 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-09Prevent ARM assembler from losing a right shift by #32 applied to a registerRichard Barton
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159937 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-09Spelling!Richard Barton
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159936 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-09Teach the assembler to use the narrow thumb encodings of various ↵Richard Barton
three-register dp instructions where permissable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159935 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27Teach assembler to handle capitalised operation values for DSB instructionsRichard Barton
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159259 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27Prevent ARM Assembler crashing on unrecognised assembly format for DSB ↵Richard Barton
instruction git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159257 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22ARM: Add a better diagnostic for some out of range immediates.Jim Grosbach
As an example of how the custom DiagnosticType can be used to provide better operand-mismatch diagnostics, add a custom diagnostic for the imm0_15 operand class used for several system instructions. Update the tests to expect the improved diagnostic. rdar://8987109 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159051 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15Fix the encoding of the armv7m (MClass) for MSR registers other than aspr,Kevin Enderby
iaspr, espr and xpsr which also needed to have 0b10 in their mask encoding bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158560 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14Replace assertion failure for badly formatted CPS instrution with error message.Richard Barton
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158445 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-02Fix typos found by http://github.com/lyda/misspell-checkBenjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157885 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24Mark a static array as const.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157368 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17Fix the encoding of the armv7m (MClass) for MSR APSR writes which was missingKevin Enderby
the 0b10 mask encoding bits. Make MSR APSR writes without a _<bits> qualifier an alias for MSR APSR_nzcvq even though ARM as deprecated it use. Also add support for suffixes (_nzcvq, _g, _nzcvqg) for APSR versions. Some FIXMEs in the code for better error checking when versions shouldn't be used. rdar://11457025 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157019 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11Fixed the LLVM ARM v7 assembler and instruction printer for 8-bit immediate ↵Silviu Baranga
offset addressing. The assembler and instruction printer were not properly handeling the #-0 immediate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156608 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-27ARM: Thumb add(sp plus register) asm constraints.Jim Grosbach
Make sure when parsing the Thumb1 sp+register ADD instruction that the source and destination operands match. In thumb2, just use the wide encoding if they don't. In Thumb1, issue a diagnostic. rdar://11219154 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155748 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-27Fix ARM assembly parsing for upper case condition codes on IT instructions.Richard Barton
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155720 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-27Refactor IT handling not to store the bottom bit of the condition code in ↵Richard Barton
the mask operand in the MCInst. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155700 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-25Unify internal representation of ARM instructions with a register ↵Richard Barton
right-shifted by #32. These are stored as shifts by #0 in the MCInst and correctly marshalled when transforming from or to assembly representation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155565 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-25Add ifdef around getSubtargetFeatureName in tablegen output file so that ↵Craig Topper
only targets that want the function get it. This prevents other targets from getting an unused function warning. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155538 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2025-09-19 08:08:03 +0000