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path: root/lib/Target/ARM/ARMPerfectShuffle.h
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2012-02-18Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵Jia Liu
MSP430, PPC, PTX, Sparc, X86, XCore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18In r131488 I misunderstood how VREV works. It splits the vector in half and ↵Tanya Lattner
splits each half. Therefore, the real problem was that we were using a VREV64 for a 4xi16, when we should have been using a VREV32. Updated test case and reverted change to the PerfectShuffle Table. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131529 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17vrev is incorrectly defined in the perfect shuffle table. The ordering is ↵Tanya Lattner
backwards (should be 0x3210 versus 0x1032) which exposed a bug when doing a shuffle on a 4xi16. I've attached a test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131488 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-14Regenerate. No functional change, just cleanup.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116459 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-25RegenerateAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82814 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21Add lowering of ARM 4-element shuffles to multiple instructios via ↵Anton Korobeynikov
perfectshuffle-generated table. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79624 91177308-0d34-0410-b5e6-96231b3b80d8
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