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path: root/lib/Target/ARM/ARMMCInstLower.cpp
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2012-02-07Convert assert(0) to llvm_unreachableCraig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149961 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-18Ignore register mask operands when lowering instructions to MC.Jakob Stoklund Olesen
This is similar to implicit register operands. MC doesn't understand register liveness and call clobbers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148437 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate ↵Evan Cheng
ARM MC code from target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135636 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08Use TableGen'erated pseudo lowering for ARM.Jim Grosbach
Hook up the TableGen lowering for simple pseudo instructions for ARM and use it for a subset of the many pseudos the backend has as proof of concept. More conversions to come. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134705 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-26Add needed braces.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124273 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13Model :upper16: and :lower16: as ARM specific MCTargetExpr. This is a stepEvan Cheng
in the right direction. It eliminated some hacks and will unblock codegen work. But it's far from being done. It doesn't reject illegal expressions, e.g. (FOO - :lower16:BAR). It also doesn't work in Thumb2 mode at all. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123369 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-01Move the ARMAsmPrinter class defintiion into a header file.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120551 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30Trailing whitespace.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120497 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14trim #includes.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119075 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14rename LowerToMCInst -> LowerARMMachineInstrToMCInst.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119071 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14even more simplifications. ARM MCInstLowering is now justChris Lattner
a single function instead of a class. It doesn't need the complexity that X86 does. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119070 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14more shrinkificationChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119068 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14more simplifications.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119067 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14simplify and tidy upChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119066 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22Add support for ELF PLT references for ARM MC asm printing. Adding aJim Grosbach
new VariantKind to the MCSymbolExpr seems like overkill, but I'm not sure there's a more straightforward way to get the printing difference captured. (i.e., x86 uses @PLT, ARM uses (PLT)). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114613 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22Enable a few additional asserts in MC instruction lowering.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114601 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22Remove a few commented out bitsJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114576 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-17handle the upper16/lower16 target operand flags on symbol references for MCJim Grosbach
instruction lowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114191 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-16Make sure to promote single precision floats to double before extracting themJim Grosbach
from the APFloat. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114096 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-16store MC FP immediates as a double instead of as an APFloat, thus avoiding anJim Grosbach
unnecessary dtor for MCOperand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114064 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-15Add support for floating point immediates to MC instruction printing. ARMJim Grosbach
VFP instructions use it for loading some constants, so implement that handling. Not thrilled with adding a member to MCOperand, but not sure there's much of a better option that's not pretty fragile (like putting a double in the union instead and just assuming that's good enough). Suggestions welcome... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113996 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-14Don't ignore the CPSR implicit def when lowering a MachineInstruction to an ↵Jim Grosbach
MCInst. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113847 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-13trailing whitespaceJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113768 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19sink the arm implementations of ASmPrinter and MCInstLowerChris Lattner
out of the AsmPrinter directory into libarm. Now the ARM InstPrinters depend jsut on the MC stuff, not on vmcore or codegen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108783 91177308-0d34-0410-b5e6-96231b3b80d8
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