llvm - http://llvm.org

Age	Commit message (Expand)	Author
2009-07-14	1. In Thumb mode, select tBx instead of ARM variants.	Evan Cheng
2009-07-11	Smarter isel of ldrsb / ldrsh. Only make use of these when [r,r] address is f...	Evan Cheng
2009-07-11	Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies...	Evan Cheng
2009-07-10	We don't need separate thumb1 instructions tADDSi3 etc. for addc and subc. Th...	Evan Cheng
2009-07-10	Add a thumb2 pass to insert IT blocks.	Evan Cheng
2009-07-09	Added Thumb IT instruction.	Evan Cheng
2009-07-08	Use common code for both ARM and Thumb-2 instruction and register info.	David Goodwin
2009-07-08	Checkpoint Thumb2 Instr info work. Generalized base code so that it can be sh...	David Goodwin
2009-06-30	Add conditional and unconditional thumb-2 branch. Add thumb-2 jump table.	David Goodwin
2009-06-30	A few more load instructions.	Evan Cheng
2009-06-29	Rename ARMcmpNZ to ARMcmpZ and use it to represent comparisons that set only ...	David Goodwin
2009-06-29	Implement Thumb2 ldr.	Evan Cheng
2009-06-27	Renaming for consistency.	Evan Cheng
2009-06-26	tst is also commutable.	Evan Cheng
2009-06-25	Add Def/Use of CPSR for Thumb-1 instructions.	David Goodwin
2009-06-25	Test commit	David Goodwin
2009-06-25	Some reorg and additional comments.	Evan Cheng
2009-06-24	Add Thumb2 pc relative add.	Evan Cheng
2009-06-23	Add IsThumb1Only to most 16-bit thumb instructions since we want to isel 32-b...	Evan Cheng
2009-06-22	Add explicit types for shift count constants. This is in preparation for	Bob Wilson
2009-06-19	Mark a few Thumb instructions commutable; just happened to spot this	Eli Friedman
2009-06-12	Mark some pattern-less instructions as neverHasSideEffects.	Evan Cheng
2009-05-12	correct register class for tADDspi to GPR since the register will always be SP	Jim Grosbach
2009-04-07	PR2985 / <rdar://problem/6584986>	Jim Grosbach
2009-03-27	remove trailing whitespace	Jim Grosbach
2008-12-03	Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning.	Dan Gohman
2008-09-12	Rename ConstantSDNode::getValue to getZExtValue, for consistency	Dan Gohman
2008-08-29	More refactoring.	Evan Cheng
2008-01-17	This commit changes:	Chris Lattner
2008-01-10	get def use info more correct.	Chris Lattner
2008-01-07	Only mark instructions that load a single value without extension as isSimple...	Evan Cheng
2008-01-06	rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.	Chris Lattner
2008-01-06	rename isStore -> mayStore to more accurately reflect what it captures.	Chris Lattner
2008-01-06	remove explicit isStore flags that are now inferrable.	Chris Lattner
2007-12-29	Remove attribution from file headers, per discussion on llvmdev.	Chris Lattner
2007-11-13	Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack	Bill Wendling
2007-09-11	Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead.	Evan Cheng
2007-08-07	Initial JIT support for ARM by Raul Fernandes Herbster.	Evan Cheng
2007-07-21	No more noResults.	Evan Cheng
2007-07-19	Change instruction description to split OperandList into OutOperandList and	Evan Cheng
2007-07-10	Remove clobbersPred. Add an OptionalDefOperand to instructions which have the...	Evan Cheng
2007-07-06	No need for ccop anymore.	Evan Cheng
2007-07-05	Each ARM use predicate operand is now made up of two components. The new comp...	Evan Cheng
2007-06-26	Revert the earlier change that removed the M_REMATERIALIZABLE machine	Dan Gohman
2007-06-19	Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad	Dan Gohman
2007-06-19	Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit.	Evan Cheng
2007-06-08	tBcc is not a barrier.	Evan Cheng
2007-06-06	Mark these instructions clobbersPred. They modify the condition code register.	Evan Cheng
2007-05-16	ARM::tB is also predicable.	Evan Cheng
2007-05-15	Add PredicateOperand to all ARM instructions that have the condition field.	Evan Cheng