| Age | Commit message (Expand) | Author |
|---|
| 2011-07-20 | Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate A... | Evan Cheng |
| 2011-06-28 | Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc | Evan Cheng |
| 2010-11-12 | Eliminate ARM::MOVi2pieces. Just use MOVi32imm and expand it to either movi+o... | Evan Cheng |
| 2010-10-29 | Convert ARM::MOVi2pieces to a true pseudo-instruction and expand it in | Jim Grosbach |
| 2010-10-27 | Refactor ARM STR/STRB instruction patterns into STR{B}i12 and STR{B}rs, like | Jim Grosbach |
| 2010-10-27 | Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing on | Jim Grosbach |
| 2010-10-26 | First part of refactoring ARM addrmode2 (load/store) instructions to be more | Jim Grosbach |
| 2010-06-02 | Slightly change the meaning of the reMaterialize target hook when the original | Jakob Stoklund Olesen |
| 2009-12-05 | Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of | Dan Gohman |
| 2009-11-14 | - Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo. | Evan Cheng |
| 2009-11-08 | Refactor code. | Evan Cheng |
| 2009-11-06 | - Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relative | Evan Cheng |
| 2009-11-02 | Use NEON reg-reg moves, where profitable. This reduces "domain-cross" stalls,... | Anton Korobeynikov |
| 2009-10-28 | Add a Thumb BRIND pattern. Change the ARM BRIND assembly to separate the | Bob Wilson |
| 2009-10-22 | Trim more includes. | Evan Cheng |
| 2009-09-28 | Make ARM and Thumb2 32-bit immediate materialization into a single 32-bit pseudo | Evan Cheng |
| 2009-09-28 | Fix thinko in my recent movt commit: it's not safe to remat movt, since it ha... | Anton Korobeynikov |
| 2009-09-27 | Use movt/movw pair to materialize 32 bit constants on ARMv6T2+. | Anton Korobeynikov |
| 2009-08-22 | Rename TargetAsmInfo (and its subclasses) to MCAsmInfo. | Chris Lattner |
| 2009-08-04 | Remove ARM specific getInlineAsmLength. We'll rely on the simpler (and faster... | Evan Cheng |
| 2009-08-02 | Move the getInlineAsmLength virtual method from TAI to TII, where | Chris Lattner |
| 2009-07-28 | - More refactoring. This gets rid of all of the getOpcode calls. | Evan Cheng |
| 2009-07-27 | More DCE. | Evan Cheng |
| 2009-07-27 | Get rid of more dead code. | Evan Cheng |
| 2009-07-27 | Get rid of some more getOpcode calls. | Evan Cheng |
| 2009-07-27 | Use t2LDRi12 and t2STRi12 to load / store to / from stack frames. Eliminate m... | Evan Cheng |
| 2009-07-25 | Change Thumb2 jumptable codegen to one that uses two level jumps: | Evan Cheng |
| 2009-07-24 | FLDD, FLDS, FCPYD, FCPYS, FSTD, FSTS, VMOVD, VMOVQ maps to the same instructi... | Evan Cheng |
| 2009-07-24 | Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index eliminatio... | David Goodwin |
| 2009-07-23 | Fix frame index elimination to correctly handle thumb-2 addressing modes that... | David Goodwin |
| 2009-07-16 | Let callers decide the sub-register index on the def operand of rematerialize... | Evan Cheng |
| 2009-07-08 | Generalize opcode selection in ARMBaseRegisterInfo. | David Goodwin |
| 2009-07-08 | Checkpoint Thumb2 Instr info work. Generalized base code so that it can be sh... | David Goodwin |
| 2009-07-02 | Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1Ins... | David Goodwin |
| 2009-07-01 | Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the... | Evan Cheng |
| 2009-06-30 | Improve Thumb-2 jump table support. | David Goodwin |
| 2009-06-30 | Add conditional and unconditional thumb-2 branch. Add thumb-2 jump table. | David Goodwin |
| 2009-06-27 | Simplify a bit | Anton Korobeynikov |
| 2009-06-27 | ARM refactoring. Step 2: split RegisterInfo | Anton Korobeynikov |
| 2009-06-26 | Split thumb-related stuff into separate classes. | Anton Korobeynikov |
| 2009-06-22 | Add support for ARM's Advanced SIMD (NEON) instruction set. | Bob Wilson |
| 2009-06-16 | GNU as refuses to assemble "pop {}" instruction. Do not emit such | Anton Korobeynikov |
| 2009-05-14 | Update the names of the exception handling sjlj instrinsics to | Jim Grosbach |
| 2009-05-13 | Change MachineInstrBuilder::addReg() to take a flag instead of a list of | Bill Wendling |
| 2009-05-12 | Add support for GCC compatible builtin setjmp and longjmp intrinsics. This is | Jim Grosbach |
| 2009-04-07 | PR2985 / <rdar://problem/6584986> | Jim Grosbach |
| 2009-04-03 | Wrap some lines to fix indentation problems. | Bob Wilson |
| 2009-04-03 | Fix some comments. | Bob Wilson |
| 2009-02-18 | Factor out the code to add a MachineOperand to a MachineInstrBuilder. | Dan Gohman |
| 2009-02-13 | Remove refs to non-DebugLoc versions of BuildMI from ARM. | Dale Johannesen |
