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path: root/lib/Target/ARM/ARMISelLowering.cpp
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2009-08-12Recognize Neon VREV shuffles during legalization instead of selection.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78850 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-12Add catch block handling to SjLj exception handling.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78817 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-12Shrink Thumb2 movcc instructions.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78790 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11Split EVT into MVT and EVT, the former representing _just_ a primitive type, ↵Owen Anderson
while the latter is capable of representing either a primitive or an extended type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78713 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11Whitespace cleanup. Remove trailing whitespace.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78666 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11Use vAny type to get rid of Neon intrinsics that differed only in whetherBob Wilson
the overloaded vector types allowed floating-point or integer vector elements. Most of these operations actually depend on the element type, so bitcasting was not an option. If you include the vpadd intrinsics that I updated earlier, this gets rid of 20 intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78646 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11SjLj based exception handling unwinding support. This patch is nasty, brutishJim Grosbach
and short. Well, it's kinda short. Definitely nasty and brutish. The front-end generates the register/unregister calls into the SjLj runtime, call-site indices and landing pad dispatch. The back end fills in the LSDA with the call-site information provided by the front end. Catch blocks are not yet implemented. Built on Darwin and verified no llvm-core "make check" regressions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78625 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10Rename MVT to EVT, in preparation for splitting SimpleValueType out into its ↵Owen Anderson
own struct type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78610 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10SimpleValueType-ify a few more methods on TargetLowering.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78595 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10Continue the SimpleValueType-ification.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78593 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07It turns out most of the thumb2 instructions are not allowed to touch SP. ↵Evan Cheng
The semantics of such instructions are unpredictable. We have just been lucky that tests have been passing. This patch takes pain to ensure all the PEI lowering code does the right thing when lowering frame indices, insert code to manipulate stack pointers, etc. It's also custom lowering dynamic stack alloc into pseudo instructions so we can insert the right instructions at scheduling time. This fixes PR4659 and PR4682. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78361 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-06Implement Neon VST[234] operations.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78330 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05Remove redundand checks: the only way to have, e.g. f32 RegVT is exactlyAnton Korobeynikov
hardfloat case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78237 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05Unbreak the stuff, this is ugly, but we cannot do better for now with ↵Anton Korobeynikov
'plain' C calling conv. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78232 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05Missed pieces for ARM HardFP ABI.Anton Korobeynikov
Patch by Sandeep Patel! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78225 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05Major calling convention code refactoring.Dan Gohman
Instead of awkwardly encoding calling-convention information with ISD::CALL, ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering provides three virtual functions for targets to override: LowerFormalArguments, LowerCall, and LowerRet, which replace the custom lowering done on the special nodes. They provide the same information, but in a more immediately usable format. This also reworks much of the target-independent tail call logic. The decision of whether or not to perform a tail call is now cleanly split between target-independent portions, and the target dependent portion in IsEligibleForTailCallOptimization. This also synchronizes all in-tree targets, to help enable future refactoring and feature work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78142 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05Change DAG nodes for Neon VLD2/3/4 operations to return multiple results.Bob Wilson
Get rid of yesterday's code to fix the register usage during isel. Select the new DAG nodes to machine instructions. The new pre-alloc pass to choose adjacent registers for these results is not done, so the results of this will generally not assemble yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78136 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04Lower Neon VLD* intrinsics to custom DAG nodes, and manually allocate theBob Wilson
results to fixed registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78025 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04Minor cleanup. No functional changes intended.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78024 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03Lower CONCAT_VECTOR during legalization instead of matching it during isel.Bob Wilson
Add a testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77992 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-02convert ctors/dtors section to be in TLOF instead ofChris Lattner
TAI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77842 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-01Fix Thumb2 function call isel. Thumb1 and Thumb2 should share the sameEvan Cheng
instructions for calls since BL and BLX are always 32-bit long and BX is always 16-bit long. Also, we should be using BLX to call external function stubs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77756 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31refactor section construction in TLOF to be through an explicitChris Lattner
initialize method, which can be called when an MCContext is available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77687 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-30Lower a 128-bit BUILD_VECTOR with 2 elements to a pair of INSERT_VECTOR_ELTs.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77557 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29Optimize Thumb2 jumptable to use tbb / tbh when all the offsets fit in byte ↵Evan Cheng
/ halfword. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77422 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28In thumb2 mode, add pc is unpredictable. Use add + mov pc instead (that is ↵Evan Cheng
until more optimization goes in). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77364 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28the apple "ld_classic" linker doesn't support .literal16 in 32-bitChris Lattner
mode, and "ld64" (the default linker) falls back to it in -static mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77334 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28Rip all of the global variable lowering logic out of TargetAsmInfo. SinceChris Lattner
it is highly specific to the object file that will be generated in the end, this introduces a new TargetLoweringObjectFile interface that is implemented for each of ELF/MachO/COFF/Alpha/PIC16 and XCore. Though still is still a brutal and ugly refactoring, this is a major step towards goodness. This patch also: 1. fixes a bunch of dangling pointer problems in the PIC16 backend. 2. disables the TargetLowering copy ctor which PIC16 was accidentally using. 3. gets us closer to xcore having its own crazy target section flags and pic16 not having to shadow sections with its own objects. 4. fixes wierdness where ELF targets would set CStringSection but not CStringSection_. Factor the code better. 5. fixes some bugs in string lowering on ELF targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77294 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-26Add support for ARM Neon VREV instructions.Bob Wilson
Patch by Anton Korzh, with some modifications from me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77101 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-25Change Thumb2 jumptable codegen to one that uses two level jumps:Evan Cheng
Before: adr r12, #LJTI3_0_0 ldr pc, [r12, +r0, lsl #2] LJTI3_0_0: .long LBB3_24 .long LBB3_30 .long LBB3_31 .long LBB3_32 After: adr r12, #LJTI3_0_0 add pc, r12, +r0, lsl #2 LJTI3_0_0: b.w LBB3_24 b.w LBB3_30 b.w LBB3_31 b.w LBB3_32 This has several advantages. 1. This will make it easier to optimize this to a TBB / TBH instruction + (smaller) table. 2. This eliminate the need for ugly asm printer hack to force the address into thumb addresses (bit 0 is one). 3. Same codegen for pic and non-pic. 4. This eliminate the need to align the table so constantpool island pass won't have to over-estimate the size. Based on my calculation, the later is probably slightly faster as well since ldr pc with shifter address is very slow. That is, it should be a win as long as the HW implementation can do a reasonable job of branch predict the second branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77024 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22Get rid of the Pass+Context magic.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76702 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15fix an arm codegen bug (the same as PR4482 on ppc) where available_externallyChris Lattner
symbols were not getting stubs. While I'm at it, add a big testcase for stub generation to make sure I don't break anything. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75737 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-14Remove an extra space.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75658 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-14llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.Torok Edwin
This adds location info for all llvm_unreachable calls (which is a macro now) in !NDEBUG builds. In NDEBUG builds location info and the message is off (it only prints "UREACHABLE executed"). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75640 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-13Fix comment typos.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75479 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-11assert(0) -> LLVM_UNREACHABLE.Torok Edwin
Make llvm_unreachable take an optional string, thus moving the cerr<< out of line. LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for NDEBUG builds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75379 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09Thread LLVMContext through MVT and related parts of SDISel.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75153 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08Use common code for both ARM and Thumb-2 instruction and register info.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75067 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08Start converting to new error handling API.Torok Edwin
cerr+abort -> llvm_report_error assert(0)+abort -> LLVM_UNREACHABLE (assert(0)+llvm_unreachable-> abort() included) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75018 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08Remove the vicmp and vfcmp instructions. Because we never had a release withNick Lewycky
these instructions, no autoupgrade or backwards compatibility support is provided. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74991 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07Add some more Thumb2 multiplication instructions.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74889 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03Add NumFixedArgs attribute to CallSDNode which indicates the number of fixed ↵Tilmann Scheller
arguments in a vararg call. With the SVR4 ABI on PowerPC, vector arguments for vararg calls are passed differently depending on whether they are a fixed or a variable argument. Variable vector arguments always go into memory, fixed vector arguments are put into vector registers. If there are no free vector registers available, fixed vector arguments are put on the stack. The NumFixedArgs attribute allows to decide for an argument in a vararg call whether it belongs to the fixed or variable portion of the parameter list. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74764 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03Add thumb2 sign / zero extend with rotate instructions.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74755 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-02Thumb2 pre/post indexed loads.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74696 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-0280 col violation.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74693 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-01Update comments to make it clear that the function alignment is the Log2 of theBill Wendling
bytes and not bytes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74624 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-30Add an "alignment" field to the MachineFunction object. It makes more sense toBill Wendling
have the alignment be calculated up front, and have the back-ends obey whatever alignment is decided upon. This allows for future work that would allow for precise no-op placement and the like. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74564 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29Rename ARMcmpNZ to ARMcmpZ and use it to represent comparisons that set only ↵David Goodwin
the Z flag (i.e. eq and ne). Make ARMcmpZ commutative. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74423 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26Thumb-2 has CLZ.David Goodwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74322 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-22Add support for ARM's Advanced SIMD (NEON) instruction set.Bob Wilson
This is still a work in progress but most of the NEON instruction set is supported. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73919 91177308-0d34-0410-b5e6-96231b3b80d8
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