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path: root/lib/Target/ARM/ARMFastISel.cpp
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2011-09-13Tidy up a few 80 column violations.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139636 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02Don't fast-isel for atomic load/store; some cases require extra handling ↵Eli Friedman
missing from fast-isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139044 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31Fixup for functions that return a bool.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138918 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23[SU]XT[BH] are only available on ARMv6 and up.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138373 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27ARM extend instructions simplification.Jim Grosbach
Refactor the SXTB, SXTH, SXTB16, UXTB, UXTH, and UXTB16 instructions to not have an 'r' and an 'r_rot' version, but just a single version with a rotate that can be zero. Use plain Pat<>'s for the ISel of the non-rotated version. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136225 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate ↵Evan Cheng
ARM MC code from target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135636 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18land David Blaikie's patch to de-constify Type, with a few tweaks.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135375 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134030 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng
sink them into MC layer. - Added MCInstrInfo, which captures the tablegen generated static data. Chang TargetInstrInfo so it's based off MCInstrInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-08Add a parameter to CCState so that it can access the MachineFunction.Eric Christopher
No functional change. Part of PR6965 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132763 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03Add ARM fast-isel support for materializing the address of a global in cases ↵Eli Friedman
where the global uses an indirect symbol. rdar://9431157 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132522 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-28Fix ARM fast isel to correctly flag memory operands to stores. This fixesCameron Zwarich
-verify-machineinstrs failures on several tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132268 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27Fix a silly mistake (which trips over an assertion) in r132099. rdar://9515076Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132194 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25Rewrite fast-isel integer cast handling to handle more cases, and to be ↵Eli Friedman
simpler and more consistent. The practical effects here are that x86-64 fast-isel can now handle trunc from i8 to i1, and ARM fast-isel can handle many more constructs involving integers narrower than 32 bits (including loads, stores, and many integer casts). rdar://9437928 . git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132099 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25Prepare ARMFastISel::SelectSIToFP for getRegForValue returning registers for ↵Eli Friedman
i8 and i16 values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132073 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-16Kill some dead code.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131431 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-02Apparently the check for direct calls is unnecessary.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130716 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29Switch to ImmLeaf (which can be used by FastISel) for a few more common ↵Eli Friedman
ARM/Thumb2 patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130552 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29Add FastEmitInst_ii for the arm fast isel generator. It doesn't use it, butEric Christopher
if it ever did it needs the def machinery. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130549 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29Some cleanup and optimize fallthrough more.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130546 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29Re-committing r130454, which does not in fact break anything.Eli Friedman
Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register. rdar://problem/9338332 . git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130539 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29Add trunc->branch support, this won't help with clang's i8->i1 truncationsEric Christopher
for bools, but is a start. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130534 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29Update comments and checks to match reality.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130464 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29Whitespace.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130463 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28Revert r130454; apparently this doesn't actually work.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130462 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28Fix a rather obscure crash caused by ARM fast-isel generating code which ↵Eli Friedman
redefines a register. rdar://problem/9338332 . git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130454 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28Be more layout aware here and swap the successor and branch conditionEric Christopher
if it means we get a fallthrough. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130404 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-16Correct result when a branch condition is live across a blockStuart Hastings
boundary. <rdar://problem/8933028> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129634 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-11Don't include Operator.h from InstrTypes.h.Jay Foad
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129271 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05Just use BL all the time. It's safer that way.Eric Christopher
Fixes rdar://9184526 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128869 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-30Add a ARM-specific SD node for VBSL so that forms with a constant first operandCameron Zwarich
can be recognized. This fixes <rdar://problem/9183078>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128584 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22Migrate the fix in r128041 to ARM's fastisel support as well.Eric Christopher
Fixes rdar://9169640 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128100 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-12Sometimes isPredicable lies to us and tells us we don't need the operands.Eric Christopher
Go ahead and add them on when we might want to use them and let later passes remove them. Fixes rdar://9118569 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127518 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-22Only use blx for external function calls on thumb, these could be fixedEric Christopher
up by the dynamic linker, but it's better to use the correct instruction to begin with. Fixes rdar://9011034 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126176 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-27Use the incoming VT not the VT of where we're trying to store to determineEric Christopher
if we can store a value. Also, the exclusion is or, not and. Fixes rdar://8920247. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124357 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18Remove unused variables found by gcc-4.6's -Wunused-but-set-variable.Jeffrey Yasskin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123707 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-17Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g.Evan Cheng
movw r0, :lower16:(L_foo$non_lazy_ptr-(LPC0_0+4)) movt r0, :upper16:(L_foo$non_lazy_ptr-(LPC0_0+4)) LPC0_0: add r0, pc, r0 It's not yet enabled by default as some tests are failing. I suspect bugs in down stream tools. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123619 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-05fix some -Wself-assign warnings.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122893 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-21Arm and thumb call instructions are also in different orders.Eric Christopher
Fixes rdar://8782223 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122313 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15Don't handle -arm-long-calls in fast isel for now.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121919 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-01Refactor load/store handling again. Simplify and make some room forEric Christopher
reg+reg handling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120526 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30Noticed this on inspection, fix and update some comments.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120447 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29Update fastisel for the changes in r120272.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120324 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.Wesley Peck
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119990 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20Rewrite address handling to use a structure with all the possible addressEric Christopher
mode variables. Handle frame indexes in load/store and allocas again. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119912 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20STRH only needs the additional operand, not t2STRH. Also invert conditionalEric Christopher
to match the one from the load emitter above. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119911 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19Don't need to save piecemeal now.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119862 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19Update comment.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119861 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19Update comment.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119859 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19Refactor address mode handling into a single struct (ala x86), thisEric Christopher
should give allow a wider range of addressing modes. No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119856 91177308-0d34-0410-b5e6-96231b3b80d8
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