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2009-12-22Add more plumbing. This time in the LowerArguments and "get" functions whichBill Wendling
return partial registers. This affected the back-end lowering code some. Also patch up some places I missed before in the "get" functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91880 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22Add SDNode ordering to inlined asm and VA functions.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91876 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22Adding more assignment of ordering to SDNodes. This time in the "call" andBill Wendling
generic copy functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91872 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22Add ordering of SDNodes to LowerCallTo.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91866 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22Now add ordering to SDNodes created by the massive intrinsic lowering function.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91863 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22To make things interesting, I added MORE code to set the ordering ofBill Wendling
SDNodes. This time in the load/store and limited-precision code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91860 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22Changed slot index ranges for MachineBasicBlocks to be exclusive of endpoint.Lang Hames
This fixes an in-place update bug where code inserted at the end of basic blocks may not be covered by existing intervals which were live across the entire block. It is also consistent with the way ranges are specified for live intervals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91859 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-21Add more plumbing to assign ordering to SDNodes. Have the "getValue" methodBill Wendling
assign the ordering when called. Combine some of the ordering assignments to keep things simple. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91857 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-21More ordering plumbing. This time for GEP. I need to remember to assignBill Wendling
orderings to values returned by getValue(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91850 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-21Another incremental check-in for assigning ordering to SDNodes. This time forBill Wendling
shuffle and insert vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91847 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-21Assign ordering to more instructions. Incremental check-in.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91846 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-21- Add a bit more plumbing assigning an order to SDNodes.Bill Wendling
- Modify the "dump" method to emit the order of an SDNode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91845 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-21First wave of plumbing for assigning an ordering to SDNodes. This takes care ofBill Wendling
a lot of the branching instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91838 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-21Place SDNodeOrdering.h in the directory it's used.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91834 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-21Fix setting and default setting of code model for jit. Do thisEric Christopher
by allowing backends to override routines that will default the JIT and Static code generation to an appropriate code model for the architecture. Should fix PR 5773. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91824 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-19Fix a bunch of little errors that Clang complains about when its being pedanticDouglas Gregor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91764 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-19Use 4-arg getVTList) variant instead of generic one, when possibleAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91744 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18Changes from review:Bill Wendling
- Move DisableScheduling flag into TargetOption.h - Move SDNodeOrdering into its own header file. Give it a minimal interface that doesn't conflate construction with storage. - Move assigning the ordering into the SelectionDAGBuilder. This isn't used yet, so there should be no functional changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91727 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18Increase opportunities to optimize (brcond (srl (and c1), c2)).Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91717 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18Add Loop contains utility methods for testing whether a loopDan Gohman
contains another loop, or an instruction. The loop form is substantially more efficient on large loops than the typical code it replaces. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91654 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18Handle ARM inline asm "w" constraints with 64-bit ("d") registers.Bob Wilson
The change in SelectionDAGBuilder is needed to allow using bitcasts to convert between f64 (the default type for ARM "d" registers) and 64-bit Neon vector types. Radar 7457110. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91649 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-17Sundry dependent-name fixes flagged by clang++.John McCall
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91636 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-17Revert accidental commit.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91635 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-17Turn off critical edge splitting for landing pads. The introduction of aBill Wendling
non-landing pad basic block as the successor to a block that ends in an unconditional jump will cause block folding to remove the added block as a successor. Thus eventually removing it AND the landing pad entirely. Critical edge splitting is an optimization, so we can safely turn it off when dealing with landing pads. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91634 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-17Temporarily revert 91337. It's causing testcase failures.Bill Wendling
$ svn merge -c -91337 https://llvm.org/svn/llvm-project/llvm/trunk --- Reverse-merging r91337 into '.': U lib/CodeGen/AsmPrinter/DwarfException.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91618 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-17Introduce EVT::getHalfSizedIntegerVT() for use in ExpandUnalignedStore() inKen Dyck
LegalizeDAG.cpp. Unlike the code it replaces, which simply decrements the simple type by one, getHalfSizedIntegerVT() searches for the smallest simple integer type that is at least half the size of the type it is called on. This approach has the advantage that it will continue working if a new value type (such as i24) is added to MVT. Also, in preparation for new value types, remove the assertions that non-power-of-2 8-bit-mutiple types are Extended when legalizing extload and truncstore operations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91614 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-17Remove debugging code.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91604 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-17Revert 91280-91283, 91286-91289, 91291, 91293, 91295-91296. It apparently ↵Evan Cheng
introduced a non-deterministic behavior in the optimizer somewhere. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91598 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-17Fix a comment grammaro.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91584 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-17Revert this dag combine change:Evan Cheng
Fold (zext (and x, cst)) -> (and (zext x), cst) DAG combiner likes to optimize expression in the other way so this would end up cause an infinite looping. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91574 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16Reapply r91392, it was only unmasking the bug, and since TOT is still broken ↵Daniel Dunbar
having it reverted does no good. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91560 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16Add @earlyclobber TableGen constraintJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91554 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16Reuse lowered phi nodes.Jakob Stoklund Olesen
Tail duplication produces lots of identical phi nodes in different basic blocks. Teach PHIElimination to reuse the join registers when lowering a phi node that is identical to an already lowered node. This saves virtual registers, and more importantly it avoids creating copies the the coalescer doesn't know how to eliminate. Teach LiveIntervalAnalysis about the phi joins with multiple uses. This patch significantly reduces code size produced by -pre-regalloc-taildup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91549 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16Revert "Initial work on disabling the scheduler. This is a work in progress, andDaniel Dunbar
this", this broke llvm-gcc bootstrap for release builds on x86_64-apple-darwin10. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91533 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16Do better with physical reg operands (typically, from inline asm)Dale Johannesen
in local register allocator. If a reg-reg copy has a phys reg input and a virt reg output, and this is the last use of the phys reg, assign the phys reg to the virt reg. If a reg-reg copy has a phys reg output and we need to reload its spilled input, reload it directly into the phys reg than passing it through another reg. Following 76208, there is sometimes no dependency between the def of a phys reg and its use; this creates a window where that phys reg can be used for spilling (this is true in linear scan also). This is bad and needs to be fixed a better way, although 76208 works too well in practice to be reverted. However, there should normally be no spilling within inline asm blocks. The patch here goes a long way towards making this actually be true. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91485 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16Explicit template instantiations must happen in the template's immediatelyJohn McCall
enclosing namespace. Caught by clang++. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91480 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16Helpful comment added. Some code cleanup. No functional change.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91479 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16Initialize uninitialized variables.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91477 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16Initialize uninitialized variables.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91475 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15Add support to emit debug info for C++ namespaces.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91440 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15Remove isPod() from DenseMapInfo, splitting it out to its ownChris Lattner
isPodLike type trait. This is a generally useful type trait for more than just DenseMap, and we really care about whether something acts like a pod, not whether it really is a pod. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91421 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15Make 91378 more conservative.Evan Cheng
1. Only perform (zext (shl (zext x), y)) -> (shl (zext x), y) when y is a constant. This makes sure it remove at least one zest. 2. If the shift is a left shift, make sure the original shift cannot shift out bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91399 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15Initial work on disabling the scheduler. This is a work in progress, and thisBill Wendling
stuff isn't used just yet. We want to model the GCC `-fno-schedule-insns' and `-fno-schedule-insns2' flags. The hypothesis is that the people who use these flags know what they are doing, and have hand-optimized the C code to reduce latencies and other conflicts. The idea behind our scheme to turn off scheduling is to create a map "on the side" during DAG generation. It will order the nodes by how they appeared in the code. This map is then used during scheduling to get the ordering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91392 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15Tail duplication should zap a copy it inserted for SSA update if the copy is ↵Evan Cheng
the only use of its source. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91390 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15Fold (zext (and x, cst)) -> (and (zext x), cst).Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91380 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15Propagate zest through logical shift.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91378 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15Revert these. They may have been causing 483_xalancbmk to fail:Bill Wendling
$ svn merge -c -91161 https://llvm.org/svn/llvm-project/llvm/trunk --- Reverse-merging r91161 into '.': U lib/CodeGen/BranchFolding.cpp U lib/CodeGen/MachineBasicBlock.cpp $ svn merge -c -91113 https://llvm.org/svn/llvm-project/llvm/trunk --- Reverse-merging r91113 into '.': G lib/CodeGen/MachineBasicBlock.cpp $ svn merge -c -91101 https://llvm.org/svn/llvm-project/llvm/trunk --- Reverse-merging r91101 into '.': U include/llvm/CodeGen/MachineBasicBlock.h G lib/CodeGen/MachineBasicBlock.cpp $ svn merge -c -91092 https://llvm.org/svn/llvm-project/llvm/trunk --- Reverse-merging r91092 into '.': G include/llvm/CodeGen/MachineBasicBlock.h G lib/CodeGen/MachineBasicBlock.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91376 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14Fix integer cast code to handle vector types.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91362 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14Fix this to properly clear the FastISel debug location. Thanks toDan Gohman
Bill for spotting this! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91355 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14The CIE says that the LSDA point in the FDE section is an "sdata4". That's fine,Bill Wendling
but we need it to actually be 4-bytes in the FDE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91337 91177308-0d34-0410-b5e6-96231b3b80d8
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