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2010-06-22When unfolding a load, avoid assuming which instruction thatDan Gohman
kill and dead flags will end up on. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106520 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22Use single interface, using twine, to get named metadata.Devang Patel
getNamedMetadata(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106518 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22Tail merging pass shall not break up IT blocks. rdar://8115404Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106517 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22Discard special LLVM prefix from linkage name.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106516 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22Do not rely on Twine temporaries to survive.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106515 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22Fix the new load-unfolding code to update LiveVariable's dead flags,Dan Gohman
in addition to the kill flags. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106512 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21Teach two-address lowering how to unfold a load to open up commutingDan Gohman
opportunities. For example, this lets it emit this: movq (%rax), %rcx addq %rdx, %rcx instead of this: movq %rdx, %rcx addq (%rax), %rcx in the case where %rdx has subsequent uses. It's the same number of instructions, and usually the same encoding size on x86, but it appears faster, and in general, it may allow better scheduling for the load. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106493 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21Use A.append(...) instead of A.insert(A.end(), ...) when A is aDan Gohman
SmallVector, and other SmallVector simplifications. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106452 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21Revert r106422, which is breaking the non-fast-isel path.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106423 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21More changes for non-top-down fast-isel.Dan Gohman
Split the code for materializing a value out of SelectionDAGBuilder::getValue into a helper function, so that it can be used in other ways. Add a new getNonRegisterValue function which uses it, for use in code which doesn't want a CopyFromReg even when FuncMap.ValueMap already has an entry for it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106422 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21Do one lookup instead of two.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106415 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21Generalize this to look in the regular ValueMap in addition toDan Gohman
the LocalValueMap, to make it more flexible when fast-isel isn't proceding straight top-down. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106414 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-19Tidy.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106383 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Teach regular and fast isel to set dead flags on unused implicit defsDan Gohman
on calls and similar instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106353 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Only run CoalesceExtSubRegs when we can expect LiveIntervalAnalysis to clean upJakob Stoklund Olesen
the inserted INSERT_SUBREGs after us. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106345 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Allow ARM if-converter to be run after post allocation scheduling.Evan Cheng
- This fixed a number of bugs in if-converter, tail merging, and post-allocation scheduler. If-converter now runs branch folding / tail merging first to maximize if-conversion opportunities. - Also changed the t2IT instruction slightly. It now defines the ITSTATE register which is read by instructions in the IT block. - Added Thumb2 specific hazard recognizer to ensure the scheduler doesn't change the instruction ordering in the IT block (since IT mask has been finalized). It also ensures no other instructions can be scheduled between instructions in the IT block. This is not yet enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106344 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18back-end libcall handling for ATOMIC_SWAP (__sync_lock_test_and_set)Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106342 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18TwoAddressInstructionPass::CoalesceExtSubRegs can insert INSERT_SUBREGJakob Stoklund Olesen
instructions, but it doesn't really understand live ranges, so the first INSERT_SUBREG uses an implicitly defined register. Fix it in LiveVariableAnalysis by adding the <undef> flag. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106333 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Fix an inverted condition.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106330 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Fix cross initialization compilation error.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106324 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Teach iff-converter to properly count # of dups. It was not skipping over ↵Evan Cheng
dbg_value's which resulted in non-duplicated instructions being deleted. rdar://8104384. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106323 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Add Expand-to-libcall support for additional atomics. This covers the usualJim Grosbach
entries used by llvm-gcc. *_[U]MIN and such can be added later if needed. This enables the front ends to simplify handling of the atomic intrinsics by removing the target-specific decision about which targets can handle the intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106321 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Don't leak RegClass2VRegMap, which is now a new[] array instead of aDan Gohman
std::vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106298 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Start TargetRegisterClass indices at 0 instead of 1, so thatDan Gohman
MachineRegisterInfo doesn't have to confusingly allocate an extra entry. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106296 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Fix PR7372: Conditional branches (at least on ARM) are treated as predicated,Bob Wilson
so when IfConverter::CopyAndPredicateBlock checks to see if it should ignore an instruction because it is a branch, it should not check if the branch is predicated. This case (when IgnoreBr is true) is only relevant from IfConvertTriangle, where new branches are inserted after the block has been copied and predicated. If the original branch is not removed, we end up with multiple conditional branches (possibly conflicting) at the end of the block. Aside from any immediate errors resulting from that, this confuses the AnalyzeBranch functions so that the branches are not analyzable. That in turn causes the IfConverter to think that the "Simple" pattern can be applied, and things go downhill fast because the "Simple" pattern does _not_ apply if the block can fall through. This is pretty fragile. If there are other degenerate cases where AnalyzeBranch fails, but where the block may still fall through, the IfConverter should not perform its "Simple" if-conversion. But, I don't know how to do that with the current AnalyzeBranch interface, so for now, the best thing seems to be to avoid creating branches that AnalyzeBranch cannot handle. Evan, please review! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106291 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Don't bother calling releaseMemory before destroying the DominatorTreeBase.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106287 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Minor code simplifications.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106286 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Give NamedRegionTimer an Enabled flag, allowing all its clients toDan Gohman
switch from this: if (TimePassesIsEnabled) { NamedRegionTimer T(Name, GroupName); do_something(); } else { do_something(); // duplicate the code, this time without a timer! } to this: { NamedRegionTimer T(Name, GroupName, TimePassesIsEnabled); do_something(); } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106285 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Don't replace the old Ordering object with a new one; just clear()Dan Gohman
the old one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106284 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Don't call clear() on DbgInfo when it's going to be deleted anyway.Dan Gohman
Don't replace the old DbgInfo with a new one when clear() on the old one is sufficient. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106283 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Change UpdateNodeOperands' operand and return value from SDValue toDan Gohman
SDNode *, since it doesn't care about the ResNo value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106282 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Eliminate unnecessary uses of getZExtValue().Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106279 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18isValueValidForType can be a static member function.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106278 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,Dan Gohman
which is faster, simpler, and less surprising. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106263 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Handle ext(ext(x)) -> ext(x) immediately, since it's simple.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106256 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-17Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). ThisStuart Hastings
addresses a longstanding deficiency noted in many FIXMEs scattered across all the targets. This effectively moves the problem up one level, replacing eleven FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path through FastISel where we actually supply a DebugLoc, fixing Radar 7421831. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106243 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-17add missing break. inconsequential as the code shouldn't be reached, butJim Grosbach
for correctness' sake, it should be there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106229 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-17Add entries for Expanding atomic intrinsics to libcalls. Just a placeholderJim Grosbach
for the moment. The implementation of the libcall will follow. Currently, the llvm-gcc knows when the intrinsics can be correctly handled by the back end and only generates them in those cases, issuing libcalls directly otherwise. That's too much coupling. The intrinsics should always be generated and the back end decide how to handle them, be it with a libcall, inline code, or whatever. This patch is a step in that direction. rdar://8097623 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106227 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-17ISD::MEMBARRIER should lower to a libcall (__sync_synchronize) if the targetJim Grosbach
sets the legalize action to Expand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106203 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-16Allow a register to be redefined multiple times in a basic block.Jakob Stoklund Olesen
LiveVariableAnalysis was a bit picky about a register only being redefined once, but that really isn't necessary. Here is an example of chained INSERT_SUBREGs that we can handle now: 68 %reg1040<def> = INSERT_SUBREG %reg1040, %reg1028<kill>, 14 register: %reg1040 +[70,134:0) 76 %reg1040<def> = INSERT_SUBREG %reg1040, %reg1029<kill>, 13 register: %reg1040 replace range with [70,78:1) RESULT: %reg1040,0.000000e+00 = [70,78:1)[78,134:0) 0@78-(134) 1@70-(78) 84 %reg1040<def> = INSERT_SUBREG %reg1040, %reg1030<kill>, 12 register: %reg1040 replace range with [78,86:2) RESULT: %reg1040,0.000000e+00 = [70,78:1)[78,86:2)[86,134:0) 0@86-(134) 1@70-(78) 2@78-(86) 92 %reg1040<def> = INSERT_SUBREG %reg1040, %reg1031<kill>, 11 register: %reg1040 replace range with [86,94:3) RESULT: %reg1040,0.000000e+00 = [70,78:1)[78,86:2)[86,94:3)[94,134:0) 0@94-(134) 1@70-(78) 2@78-(86) 3@86-(94) rdar://problem/8096390 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106152 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-16add FIXMEJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106126 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-16Improve comment to include that the use of a preg is also verboten in this ↵Bill Wendling
situation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106119 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-16Make post-ra scheduling, anti-dep breaking, and register scavenger ↵Evan Cheng
(conservatively) aware of predicated instructions. This enables ARM to move if-conversion before post-ra scheduler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106091 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-16Use separate named MDNode to hold each function's local variable info.Devang Patel
This speeds up local variable handling in DwarfDebug. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106075 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-16Don't emit the linkage for initializer label for mach-o tls.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106073 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15Create a more targeted fix for not sinking instructions into a range where itBill Wendling
will conflict with another live range. The place which creates this scenerio is the code in X86 that lowers a select instruction by splitting the MBBs. This eliminates the need to check from the bottom up in an MBB for live pregs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106066 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15Added a comment.Stuart Hastings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106063 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15Fix 80col violations, remove trailing whitespace, and clarify a comment.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106057 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15Remove the local register allocator.Jakob Stoklund Olesen
Please use the fast allocator instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106051 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15Fixed vector widening of binary instructions that can trap. Patch by Visa ↵Mon P Wang
Putkinen! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106038 91177308-0d34-0410-b5e6-96231b3b80d8
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