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2011-07-01Rename TargetSubtarget to TargetSubtargetInfo for consistency.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134259 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Disable commit 134216 ("Add 134199 back, but disable the optimization when ↵Duncan Sands
the second copy is a kill") to see if it fixes the i386 dragonegg buildbot, which is timing out because gcc built with dragonegg is going into an infinite loop. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134237 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Avoid DenseMap lookup.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134231 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Fix off by one error. I misunderstood the comment about killedAt.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134229 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Check the liveinterval, not the kill flag.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134228 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Don't inflate register classes used by inline asm.Jakob Stoklund Olesen
The constraints are represented by the register class of the original virtual register created for the inline asm. If the register class were included in the operand descriptor, we might be able to do this. For now, just give up on regclass inflation when inline asm is involved. No test case, this bug hasn't happened yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134226 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Add 134199 back, but disable the optimization when the second copy is a kill.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134216 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30Revert my previous patch while I debug llvm-gcc bootstrap.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134201 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30Don't give up on coalescing A and B when we findRafael Espindola
A = X B = X Instead, proceed as if we had found A = X B = A git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134199 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30Create a isFullCopy predicate.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134189 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30Remove dead code.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134148 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30Reapply r134047 now that the world is ready for it.Jakob Stoklund Olesen
This patch will sometimes choose live range split points next to interference instead of always splitting next to a register point. That means spill code can now appear almost anywhere, and it was necessary to fix code that didn't expect that. The difficult places were: - Between a CALL returning a value on the x87 stack and the corresponding FpPOP_RETVAL (was FpGET_ST0). Probably also near x87 inline assembly, but that didn't actually show up in testing. - Between a CALL popping arguments off the stack and the corresponding ADJCALLSTACKUP. Both are fixed now. The only place spill code can't appear is after terminators, see SplitAnalysis::getLastSplitPoint. Original commit message: Rewrite RAGreedy::splitAroundRegion, now with cool ASCII art. This function has to deal with a lot of special cases, and the old version got it wrong sometimes. In particular, it would sometimes leave multiple uses in the stack interval in a single block. That causes bad code with multiple reloads in the same basic block. The new version handles block entry and exit in a single pass. It first eliminates all the easy cases, and then goes on to create a local interval for the blocks with difficult interference. Previously, we would only create the local interval for completely isolated blocks. It can happen that the stack interval becomes completely empty because we could allocate a register in all edge bundles, and the new local intervals deal with the interference. The empty stack interval is harmless, but we need to remove a SplitKit assertion that checks for empty intervals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134125 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30Remove getRegClassForInlineAsmConstraint and all dependencies.Eric Christopher
Fixes rdar://9643582 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134123 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29Revert r133953 for now.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134116 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29make compose and isMoveInstr static functions.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134093 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29Revert a part of r126557 which could create unschedulable DAGs.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134067 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29Revert r134047 while investigating a llvm-gcc-i386-linux-selfhostJakob Stoklund Olesen
miscompile. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134053 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29Sink SubtargetFeature and TargetInstrItineraries (renamed ↵Evan Cheng
MCInstrItineraries) into MC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134049 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29Rewrite RAGreedy::splitAroundRegion, now with cool ASCII art.Jakob Stoklund Olesen
This function has to deal with a lot of special cases, and the old version got it wrong sometimes. In particular, it would sometimes leave multiple uses in the stack interval in a single block. That causes bad code with multiple reloads in the same basic block. The new version handles block entry and exit in a single pass. It first eliminates all the easy cases, and then goes on to create a local interval for the blocks with difficult interference. Previously, we would only create the local interval for completely isolated blocks. It can happen that the stack interval becomes completely empty because we could allocate a register in all edge bundles, and the new local intervals deal with the interference. The empty stack interval is harmless, but we need to remove a SplitKit assertion that checks for empty intervals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134047 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134030 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng
sink them into MC layer. - Added MCInstrInfo, which captures the tablegen generated static data. Chang TargetInstrInfo so it's based off MCInstrInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28Print registers by name instead of by number.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134013 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28Fix CMake build by removing this now dead file.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133981 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28Fix a bad iterator dereference that Evan uncovered.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133978 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27Remove RegClass2VRegMap from MachineRegisterInfo.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133967 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27Remove the experimental (and unused) pre-ra splitting pass. Greedy regalloc ↵Evan Cheng
can split live ranges. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133962 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27During bottom up fast-isel, instructions emitted to materalize registers are ↵Devang Patel
at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133953 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133944 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27The index stored in the RegDefIter is one after the current index. When ↵Owen Anderson
getting the index, decrement it so that it points to the current element. Fixes an off-by-one bug encountered when trying to make use of MVT::untyped. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133923 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27pre-RA-sched: Cleanup register pressure tracking.Andrew Trick
Removed the check that peeks past EXTRA_SUBREG, which I don't think makes sense any more. Intead treat it as a normal register def. No significant affect on x86 or ARM benchmarks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133917 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27Track live-out physical registers in MachineDCE.Jakob Stoklund Olesen
Patch by Sanjoy Das! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133910 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27Distinguish early clobber output operands from clobbered registers.Jakob Stoklund Olesen
Both become <earlyclobber> defs on the INLINEASM MachineInstr, but we now use two different asm operand kinds. The new Kind_Clobber is treated identically to the old Kind_RegDefEarlyClobber for now, but x87 floating point stack inline assembly does care about the difference. This will pop a register off the stack: asm("fstp %st" : : "t"(x) : "st"); While this will pop the input and push an output: asm("fst %st" : "=&t"(r) : "t"(x)); We need to know if ST0 was a clobber or an output operand, and we can't depend on <dead> flags for that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133902 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27Decode and pretty print inline asm operand descriptors.Jakob Stoklund Olesen
The INLINEASM MachineInstrs have an immediate operand describing each original inline asm operand. Decode the bits in MachineInstr::print() so it is easier to read: INLINEASM <es:rorq $1,$0>, $0:[regdef], %vreg0<def>, %vreg1<def>, $1:[imm], 1, $2:[reguse] [tiedto:$0], %vreg2, %vreg3, $3:[regdef-ec], %EFLAGS<earlyclobber,imp-def> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133901 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-26Remove unused methods.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133900 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-26There is only one register coalescer. Merge it into the base class andRafael Espindola
remove the analysis group. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133899 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-26Merge SimpleRegisterCoalescing.cpp into RegisterCoalescer.cpp.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133897 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-26merge SimpleRegisterCoalescing.h into RegisterCoalescer.h.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133896 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-26Move RegisterCoalescer.h to lib/CodeGen.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133895 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-26Remove unnecessary wrapper.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133886 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24The scheduler needs to be aware on the existence of untyped nodes when it ↵Owen Anderson
performs type propagation for EXTRACT_SUBREG. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133838 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24Handle debug info for i128 constants.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133821 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24SimplifyRafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133798 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24Now that bb with phis are not considered simple, duplicate them even ifRafael Espindola
we cannot duplicate to every predecessor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133797 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24Simplify now that blocks with phis are not considered simple.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133793 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24Starting to refactor Target to separate out code that's needed to fully describeEvan Cheng
target machine from those that are only needed by codegen. The goal is to sink the essential target description into MC layer so we can start building MC based tools without needing to link in the entire codegen. First step is to refactor TargetRegisterInfo. This patch added a base class MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to separate register description from the rest of the stuff. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133782 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23Use the presence of the __compact_unwind section to indicate that a targetBill Wendling
supports compact unwind info instead of having a separate flag indicating this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133685 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23Move more logic to shouldTailDuplicate and only duplicate regular bb beforeRafael Espindola
register allocation if it has a indirectbr or if we can duplicate it to every predecessor. This fixes the SingleSource/Benchmarks/Shootout-C++/matrix.cpp regression but keeps the previous improvements to sunspider. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133682 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-22Add a flag that indicates whether a target supports compact unwind info or not.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133662 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-22Reenable tail duplication of bb with just an unconditional jump, butRafael Espindola
don't remove blocks that have their address taken. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133659 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-22Add a __LD,__compact_unwind section.Bill Wendling
If the linker supports it, this will hold the CIE and FDE information in a compact format. The implementation of the compact unwinding emission is coming soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133658 91177308-0d34-0410-b5e6-96231b3b80d8
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